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    11.
    发明专利
    未知

    公开(公告)号：DE69222762D1

    公开(公告)日：1997-11-20

    申请号：DE69222762

    申请日：1992-07-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BORGATO PIERANDREA ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO

    IPC: G01R19/12 ,  G01R19/165 ,  H02M3/156 ,  H02M1/14

    Abstract: A circuit (39) for detecting voltage variations in relation to a set value, for devices (1), more specifically a power supply circuit, comprising an error amplifier (27) fed back by a compensating capacitor (28) which, under steady state operating conditions, is not supplied with current, and, in the presence of transient output voltage (Vo) of the device (1), is supplied with current (DI) proportional to the variation in voltage; the circuit (39) comprising a current sensor (40) connected to the compensating capacitor (28) for detecting the current (DI) through the same; and the output signal of the sensor (40) preferably being supplied to a circuit (43, 44) for limiting the variation in output voltage which, in the event the voltage variation exceeds a given threshold value (VR1), activates a control stage (31) connected to the output of the device.

    12.
    发明专利
    未知

    公开(公告)号：IT1243692B

    公开(公告)日：1994-06-21

    申请号：IT2108790

    申请日：1990-07-27

    Applicant: ST MICROELECTRONICS SRL

    Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

    IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K

    Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

    13.
    发明专利
    未知

    公开(公告)号：DE69832258D1

    公开(公告)日：2005-12-15

    申请号：DE69832258

    申请日：1998-02-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： LEGNANI MARCO ALESSANDRO ,  PIDUTTI ALBINO

    IPC: H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/78

    Abstract: The protection structure (1) has a plurality of protection regions (2) extending along closed lines arranged inside each other. Each intermediate protection region (2) is tangent to two different adjacent protection regions (2), at different areas (3), such as to form a connection in series with them. The protection structure (1) can be of resistive material, such as to form a series of resistors, or it can include doped portions alternately of P- and N-type, such as to form a plurality of anti-series arranged diodes. The structure can be made of polycrystalline silicon extending on the substrate surface, or can be integrated (implanted or diffused) inside the substrate.

    15.
    发明专利
    未知

    公开(公告)号：DE69131532D1

    公开(公告)日：1999-09-23

    申请号：DE69131532

    申请日：1991-06-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

    IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K17/06

    Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

    17.
    发明专利
    未知

    公开(公告)号：DE60225603T2

    公开(公告)日：2009-04-23

    申请号：DE60225603

    申请日：2002-07-19

    Applicant: ST MICROELECTRONICS SRL

    Inventor： FAGNANI MAURO ,  PIDUTTI ALBINO ,  ADRAGNA CLAUDIO

    IPC: H02M1/00 ,  H02M1/36 ,  H02M3/335

    Abstract: A bootstrap circuit for switching power supplies (SMPS), a switching power supply including a bootstrap circuit, and an integrated circuit of a switching power supply, are provided. The bootstrap circuit ( 13 ) for switching power supplies includes a first supply voltage (Vin) coming from a first terminal and a second supply voltage (Vcc) coming from a second terminal and a third terminal ( 30 ). The bootstrap circuit includes: a first current path between the first terminal and the third terminal ( 30 ); a second current path between the first terminal and the second terminal; a third current path between the second terminal and the third terminal ( 30 ); and a two-way voltage regulator (M 3 , Dz 2 , R 5 , R 6 ) placed along the second current path.

    19.
    发明专利
    未知

    公开(公告)号：DE69131532T2

    公开(公告)日：2000-04-06

    申请号：DE69131532

    申请日：1991-06-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

    IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K17/06

    Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

    20.
    发明专利
    未知

    公开(公告)号：DE69222762T2

    公开(公告)日：1998-02-12

    申请号：DE69222762

    申请日：1992-07-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BORGATO PIERANDREA ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO

    IPC: G01R19/12 ,  G01R19/165 ,  H02M3/156 ,  H02M1/14

    Abstract: A circuit (39) for detecting voltage variations in relation to a set value, for devices (1), more specifically a power supply circuit, comprising an error amplifier (27) fed back by a compensating capacitor (28) which, under steady state operating conditions, is not supplied with current, and, in the presence of transient output voltage (Vo) of the device (1), is supplied with current (DI) proportional to the variation in voltage; the circuit (39) comprising a current sensor (40) connected to the compensating capacitor (28) for detecting the current (DI) through the same; and the output signal of the sensor (40) preferably being supplied to a circuit (43, 44) for limiting the variation in output voltage which, in the event the voltage variation exceeds a given threshold value (VR1), activates a control stage (31) connected to the output of the device.

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