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    DETECTOR AND DEVICE DETECTING VOLTAGE FLUCTUATION TO SET VALUE AND ELECTRIC POWER SUPPLY CIRCUIT
    1.
    发明专利
    DETECTOR AND DEVICE DETECTING VOLTAGE FLUCTUATION TO SET VALUE AND ELECTRIC POWER SUPPLY CIRCUIT 失效

    公开(公告)号：JPH06174762A

    公开(公告)日：1994-06-24

    申请号：JP17551393

    申请日：1993-07-15

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BORGATO PIERANDREA ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO

    IPC: G01R19/12 ,  G01R19/165 ,  H02M3/156

    Abstract: PURPOSE: To obtain a detection circuit where the output terminal requires no additional pin for producing an external signal by providing a sensor for detecting a current flowing through a feedback branch and proportional to the fluctuation of output voltage at the output terminal. CONSTITUTION: A detection circuit 39 in the apparatus comprises a current sensor 40 disposed between a pin 29 and the output terminal 41 of an error amplifier 27 and generating a current signal KDI proportional to the current DI of a compensation capacitor 28 at an output terminal 42. When the output voltage Vo fluctuates, e.g. it increases by DVo for example, it is detected only by a resistor 16. Consequently, the current increases by an amount DI equal to DVo /R2 and the current DI flows through the compensation capacitor 28 and detected by the current sensor 40. The current is proportional to the instantaneous fluctuation of the output voltage Vo . A detection circuit 39 is integrated conveniently on a control circuit 8 which does not require any additional pin on the package.

    CIRCUIT USED TO DRIVE FLOATING CIRCUIT IN RESPONSE TO DIGITAL SIGNAL
    2.
    发明专利
    CIRCUIT USED TO DRIVE FLOATING CIRCUIT IN RESPONSE TO DIGITAL SIGNAL 失效

    公开(公告)号：JPH04270513A

    公开(公告)日：1992-09-25

    申请号：JP18241991

    申请日：1991-07-23

    Applicant: ST MICROELECTRONICS SRL

    Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

    IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185

    Abstract: PURPOSE: To provide a circuit which drives the floating circuit, in response to a binary-coded decimal signal and is small in power consumption in a stationary state. CONSTITUTION: This circuit has two DMOS transistors(TR) 10 and 12 which are actuated with a digital signal IN and driven in opposite phase by respective gates. The two DMOS TRs 10 and 12 are biased by current mirrors 16 and 18, which reflect a reference current IBIAS and auxiliary circuits 34 to 44 which impress other current pulses during switching. Two DMOS TRs 20 and 22 operate as loads with respect to the two DMOS TRs 10 and 12. Since two Zener diodes 24 and 26 can be used to limit the voltages between the gates and sources of the MOS TRs 20 and 22. A drive output part of the floating circuit may be a drain of one of the DMOS TRs.

    6.
    发明专利
    未知

    公开(公告)号：IT1318881B1

    公开(公告)日：2003-09-10

    申请号：ITMI20002044

    申请日：2000-09-19

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BATTAGLIN LUCA ,  GALLINA PIETRO ,  SABA GIANCARLO ,  ZINCO GIANCARLO ,  DIAZZI CLAUDIO ,  PEDUTO VITTORIO

    IPC: H01L41/04 ,  H03K17/56 ,  H03K4/94 ,  H03K17/00 ,  H03K17/16

    Abstract: A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.

    7.
    发明专利
    未知

    公开(公告)号：DE69222762D1

    公开(公告)日：1997-11-20

    申请号：DE69222762

    申请日：1992-07-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BORGATO PIERANDREA ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO

    IPC: G01R19/12 ,  G01R19/165 ,  H02M3/156 ,  H02M1/14

    Abstract: A circuit (39) for detecting voltage variations in relation to a set value, for devices (1), more specifically a power supply circuit, comprising an error amplifier (27) fed back by a compensating capacitor (28) which, under steady state operating conditions, is not supplied with current, and, in the presence of transient output voltage (Vo) of the device (1), is supplied with current (DI) proportional to the variation in voltage; the circuit (39) comprising a current sensor (40) connected to the compensating capacitor (28) for detecting the current (DI) through the same; and the output signal of the sensor (40) preferably being supplied to a circuit (43, 44) for limiting the variation in output voltage which, in the event the voltage variation exceeds a given threshold value (VR1), activates a control stage (31) connected to the output of the device.

    8.
    发明专利
    未知

    公开(公告)号：IT1243692B

    公开(公告)日：1994-06-21

    申请号：IT2108790

    申请日：1990-07-27

    Applicant: ST MICROELECTRONICS SRL

    Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

    IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K

    Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

    9.
    发明专利
    未知

    公开(公告)号：DE60111248D1

    公开(公告)日：2005-07-07

    申请号：DE60111248

    申请日：2001-09-18

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BATTAGLIN LUCA ,  GALLINA PIETRO ,  SABA GIANCARLO ,  ZINCO GIANCARLO ,  DIAZZI CLAUDIO ,  PEDUTO VITTORIO

    IPC: H03K17/56 ,  H01L41/04 ,  H03K4/94 ,  H03K17/00 ,  H03K17/16

    Abstract: A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.

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