公开(公告)号：JPH04270513A

公开(公告)日：1992-09-25

申请号：JP18241991

申请日：1991-07-23

Applicant: ST MICROELECTRONICS SRL

Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185

Abstract: PURPOSE: To provide a circuit which drives the floating circuit, in response to a binary-coded decimal signal and is small in power consumption in a stationary state. CONSTITUTION: This circuit has two DMOS transistors(TR) 10 and 12 which are actuated with a digital signal IN and driven in opposite phase by respective gates. The two DMOS TRs 10 and 12 are biased by current mirrors 16 and 18, which reflect a reference current IBIAS and auxiliary circuits 34 to 44 which impress other current pulses during switching. Two DMOS TRs 20 and 22 operate as loads with respect to the two DMOS TRs 10 and 12. Since two Zener diodes 24 and 26 can be used to limit the voltages between the gates and sources of the MOS TRs 20 and 22. A drive output part of the floating circuit may be a drain of one of the DMOS TRs.

公开(公告)号：IT1243692B

公开(公告)日：1994-06-21

申请号：IT2108790

申请日：1990-07-27

Applicant: ST MICROELECTRONICS SRL

Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K

Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

公开(公告)号：DE69131532D1

公开(公告)日：1999-09-23

申请号：DE69131532

申请日：1991-06-24

Applicant: ST MICROELECTRONICS SRL

Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K17/06

Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.

公开(公告)号：DE69131532T2

公开(公告)日：2000-04-06

申请号：DE69131532

申请日：1991-06-24

Applicant: ST MICROELECTRONICS SRL

Inventor： VIO FABIO ,  DIAZZI CLAUDIO ,  PIDUTTI ALBINO ,  MARTIGNONI FABRIZIO

IPC: H03K17/567 ,  H03K3/356 ,  H03K17/687 ,  H03K19/0185 ,  H03K17/06

Abstract: A driving circuit for driving a floating circuit (28) responsive to a digital signal (IN) includes two DMOS transistors (10, 12) which are driven in opposite phase on their respective gates starting from the digital signal. The two DMOS transistors are biased by a current source which is formed by a current mirror (16, 18), which mirrors a reference current (IBIAS), and by an auxiliary circuit (34-44) for injecting an additional current pulse during switching. Two MOS transistors (20, 22) serve as the respective load for the two DMOS transistors. The MOS transistors can be P-channel transistors, in which event the gate of each MOS transistor (20, 22) can be connected to the drain of the other MOS transistor. Two Zener diodes (24, 26) can be employed to limit the voltage between the gate and the source of the respective MOS transistor. The driving output of the floating circuit (28) can be the drain of one of the DMOS transistors.