公开(公告)号：EP3945602A1

公开(公告)日：2022-02-02

申请号：EP21188927.4

申请日：2021-07-30

Applicant: STMicroelectronics S.r.l.

Inventor： PATTI, Davide Giuseppe

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/336

Abstract: An integrated device (100) is proposed comprising at least one MOS transistor (105) having a plurality of cells (135,150). In each of one or more of the cells (135,150) a disabling structure (175,180) is provided; the disabling structure (175,180) is configured to be in a non-conductive condition when the MOS transistor (105) is switched on in response to a control voltage comprised between a threshold voltage of the MOS transistor (105) and an intervention voltage of the disabling structure (175,180), or to be in a conductive condition otherwise. A system (400) comprising at least one integrated device (100) as above is also proposed. Moreover, a corresponding process for manufacturing this integrated device (100) is proposed.

公开(公告)号：EP3859789A1

公开(公告)日：2021-08-04

申请号：EP21154045.5

申请日：2021-01-28

Applicant: STMicroelectronics S.r.l.

Inventor： PATTI, Davide Giuseppe ,  SCURATI, Mario Giovanni ,  MORELLI, Marco

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/417

Abstract: The vertical conduction electronic power device (51) is formed by a body (70) delimited by a first and a second surface (70A, 70B) and having an epitaxial layer (54), of semiconductor material, and a substrate (90). The epitaxial layer is delimited by the first surface (70A) of the body and the substrate is delimited by the second surface (70B) of the body; the epitaxial layer houses at least a first and a second conduction region (56, 60) having a first type of doping (N) and a plurality of insulated-gate regions (59), which extend within the epitaxial layer (54). The substrate (90) has at least one silicide region (91), which extends starting from the second surface (70B) of the body (70) towards the epitaxial layer.

公开(公告)号：EP3151282A1

公开(公告)日：2017-04-05

申请号：EP16161888.9

申请日：2016-03-23

Applicant: STMicroelectronics S.r.l.

Inventor： PATTI, Davide Giuseppe ,  GRIMALDI, Antonio Giuseppe

IPC: H01L29/08 ,  H01L29/78 ,  H01L21/336

Abstract: A vertical conduction integrated electronic device including: a semiconductor body (12); a trench (22) that extends through part of the semiconductor body and delimits a portion (24) of the semiconductor body, which comprises a first conduction region (16) having a first type of conductivity and a body region (40) having a second type of conductivity, which overlies the first conduction region; a gate region (30) of conductive material, which extends within the trench; an insulation region (39a) of dielectric material, which extends within the trench and is arranged between the gate region and the body region; and a second conduction region (20), which overlies the body region. The second conduction region is formed by a conductor.

Abstract translation: 垂直传导电子设备集成，包括：半导体主体（12）; 的沟槽（22）那样通过半导体本体的一部分延伸，并限定所述半导体本体的部分（24），其包括具有第一类型导电性的和主体区域（40）具有第二的第一导电区域（16） 性，这覆盖在第一传导区域的类型; 导电材料，其在所述沟槽内延伸的栅极区（30）; 电介质材料，其在所述沟槽内延伸，并且所述栅区和所述本体区域之间设置的绝缘区域（39A）的; 并且其覆盖所述主体区域中的第二传导区（20）。 第二导电区域由导体形成。