公开(公告)号：US20220059534A1

公开(公告)日：2022-02-24

申请号：US17231502

申请日：2021-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUNGIN CHOI ,  JINBUM KIM ,  Haejun YU ,  SEUNG HUN LEE

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417

Abstract: A semiconductor device includes: a first active pattern on a substrate and including a first active fin and a second active fin; a device isolation layer defining the first active pattern; a gate electrode crossing the first active pattern; a first source/drain pattern and a second source/drain pattern on the first active fin and the second active fin, respectively; an inner fin spacer between the first and second source/drain patterns; and a buffer layer between the first and second active fins, wherein the inner fin spacer includes: a first inner spacer portion contacting the first source/drain pattern; a second inner spacer portion contacting the second source/drain pattern; and an inner extended portion extending from the first and second inner spacer portions, wherein the inner extended portion is between the first and second active fins, wherein the buffer layer has a dielectric constant higher than that of the inner fin spacer.

公开(公告)号：US20210343841A1

公开(公告)日：2021-11-04

申请号：US17088011

申请日：2020-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： ILGYOU SHIN ,  MINYI KIM ,  MYUNG GIL KANG ,  JINBUM KIM ,  SEUNG HUN LEE ,  KEUN HWI CHO

IPC: H01L29/15 ,  H01L29/10 ,  H01L29/417 ,  H01L29/78

Abstract: A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.

公开(公告)号：US20180122922A1

公开(公告)日：2018-05-03

申请号：US15800242

申请日：2017-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： SEOKHOON KIM ,  WOO BIN SONG ,  SUNJUNG KIM ,  JinBum KIM ,  SANGMOON LEE ,  SEUNG HUN LEE ,  DONGSUK SHIN

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L21/762 ,  H01L23/31

CPC classification number: H01L29/66795 ,  H01L21/76224 ,  H01L23/3171 ,  H01L29/16 ,  H01L29/20 ,  H01L29/267 ,  H01L29/42364 ,  H01L29/785 ,  H01L29/7851

Abstract: Disclosed is a semiconductor device. The semiconductor device comprises a fin structure on a substrate, device isolation patterns provided on the substrate and disposed on opposite sides of the fin structure, a gate electrode running across the fin structure and the device isolation patterns, a gate dielectric pattern between the gate electrode and the fin structure and between the gate electrode and the device isolation patterns, and a capping layer between the substrate and the device isolation patterns and between the fin structure and the device isolation patterns. The capping layer has a thickness greater than a thickness of the gate dielectric pattern.