公开(公告)号：US20240008289A1

公开(公告)日：2024-01-04

申请号：US18340407

申请日：2023-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Taehwan MOON ,  Seunggeol NAM ,  Hyunjae LEE

IPC: H10B53/20 ,  H10B53/30

CPC classification number: H10B53/20 ,  H10B53/30

Abstract: Provided is a 3D ferroelectric memory device. The 3D ferroelectric memory device may include a plurality of gate electrodes stacked on a substrate in a first direction; a plurality of ferroelectric layers on the plurality of gate electrodes in a second direction; a plurality of intermediate electrodes on the plurality of ferroelectric layers in the second direction; a first insulating layer between the plurality of gate electrodes and between the plurality of intermediate electrodes; a second insulating layer on the plurality of intermediate electrodes and the first insulating layer; and a channel layer on the second insulating layer.

公开(公告)号：US20230397432A1

公开(公告)日：2023-12-07

申请号：US18329197

申请日：2023-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Taehwan MOON ,  Seunggeol NAM ,  Hyunjae LEE ,  Dukhyun CHOE

IPC: H10B53/20 ,  H10B53/10 ,  G11C16/04 ,  H10B51/10 ,  H10B51/20

CPC classification number: H10B53/20 ,  H10B53/10 ,  G11C16/0483 ,  H10B51/10 ,  H10B51/20

Abstract: A memory device includes a plurality of gate electrodes spaced apart from each other in a first direction, a memory layer comprising a plurality of memory regions that protrude and extend in a second direction perpendicular to the first direction to face the plurality of gate electrodes, respectively, a plurality of first insulating layers extended to spaces between the plurality of memory regions between the plurality of gate electrodes, a channel layer disposed between the memory layer and the plurality of gate electrodes, the channel layer having a shape including a plurality of first regions surrounding the plurality of memory regions and a second region that connects the plurality of first regions to each other in the first direction, and a gate insulating layer arranged between the channel layer and the plurality of gate electrodes.

公开(公告)号：US20210408255A1

公开(公告)日：2021-12-30

申请号：US17468098

申请日：2021-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehwan MOON ,  Eunha LEE ,  Junghwa KIM ,  Hyangsook LEE ,  Sanghyun JO ,  Jinseong HEO

IPC: H01L29/423 ,  H01L21/28 ,  H01L21/02 ,  H01L27/108 ,  H01L49/02 ,  H01L29/51

Abstract: Provided are an electronic device including a dielectric layer having an adjusted crystal orientation and a method of manufacturing the electronic device. The electronic device includes a seed layer provided on a substrate and a dielectric layer provided on the seed layer. The seed layer includes crystal grains having aligned crystal orientations. The dielectric layer includes crystal grains having crystal orientations aligned in the same direction as the crystal orientations of the seed layer.

公开(公告)号：US20210313439A1

公开(公告)日：2021-10-07

申请号：US17119337

申请日：2020-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee LEE ,  Sangwook KIM ,  Seunggeol NAM ,  Taehwan MOON ,  Yunseong LEE ,  Sanghyun JO ,  Jinseong HEO

IPC: H01L29/49 ,  H01L29/786 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40

Abstract: Disclosed herein is an electronic device including: a lower gate electrode; a ferroelectric layer covering the lower gate electrode; a first insertion layer covering the ferroelectric layer and including a dielectric material; a channel layer provided on the first insertion layer, at a position corresponding to the lower gate electrode, the channel layer including an oxide semiconductor material; and a source electrode and a drain electrode formed to be electrically connected to both ends of the channel layer, respectively.

公开(公告)号：US20230186086A1

公开(公告)日：2023-06-15

申请号：US18063936

申请日：2022-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehwan MOON ,  Jinseong HEO ,  Seunggeol NAM ,  Hagyoul BAE ,  Hyunjae LEE

IPC: G06N3/08 ,  G06N3/04

CPC classification number: G06N3/08 ,  G06N3/04

Abstract: Provided is a neural network device including a plurality of word lines extending in a first direction, a plurality of bit lines extending in a second direction intersecting the first direction, and a plurality of memory cells arranged at points where the plurality of word lines and the plurality of bit lines intersect one another. Each of the plurality of memory cells includes at least two ferroelectric memories connected in parallel along a word line corresponding to each of the plurality of memory cells.

公开(公告)号：US20230068904A1

公开(公告)日：2023-03-02

申请号：US17876979

申请日：2022-07-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Hyangsook LEE ,  Sanghyun JO ,  Seunggeol NAM ,  Taehwan MOON ,  Hagyoul BAE ,  Eunha LEE ,  Junho LEE

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/10

Abstract: An electronic device includes: a substrate including a source, a drain, and a channel between the source and the drain; a gate electrode arranged above the substrate and facing the channel, the gate electrode being apart from the channel in a first direction; and a ferroelectric thin film structure between the channel and the gate electrode, the ferroelectric thin film structure including a first ferroelectric layer, a crystallization barrier layer including a dielectric material, and a second ferroelectric layer, which are sequentially arranged from the channel in the first direction. The average of sizes of crystal grains of the first ferroelectric layer may be less than or equal to the average of sizes of crystal grains of the second ferroelectric layer, and owing to small crystal grains, dispersion of performance may be improved.

公开(公告)号：US20230068706A1

公开(公告)日：2023-03-02

申请号：US17896481

申请日：2022-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hagyoul BAE ,  Jinseong HEO ,  Seunggeol NAM ,  Taehwan MOON ,  Yunseong LEE

IPC: H01L27/24 ,  H01L27/11582 ,  H01L27/11597

Abstract: A non-volatile memory device is provided. The nonvolatile memory device includes a metal pillar, a channel layer separated from the metal pillar and surrounding a side surface of the metal pillar, a source arranged on one end of the channel layer, a drain arranged on the other end of the channel layer, a gate insulating layer surrounding a side surface of the channel layer, and a plurality of insulating elements and a plurality of gate electrodes alternately arranged along a surface of the gate insulating layer and surrounding a side surface of the gate insulating layer.

公开(公告)号：US20220140104A1

公开(公告)日：2022-05-05

申请号：US17515969

申请日：2021-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Seunggeol NAM ,  Hagyoul BAE ,  Taehwan MOON ,  Sanghyun JO

IPC: H01L29/51 ,  H01L29/78

Abstract: Provided is a ferroelectric semiconductor device including a ferroelectric layer and two or more electrode layers. The semiconductor device may include a first electrode layer and a second electrode layer which have thermal expansion coefficients less than the thermal expansion coefficient of the ferroelectric layer. The difference between the thermal expansion coefficients of the second electrode layer and the ferroelectric layer may be greater than the difference between the thermal expansion coefficients of the first electrode layer and the ferroelectric. The second electrode layer may have a thickness greater than the thickness of the first electrode layer.

公开(公告)号：US20220005923A1

公开(公告)日：2022-01-06

申请号：US17171291

申请日：2021-02-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehwan MOON ,  Jinseong HEO ,  Sangwook KIM ,  Yunseong LEE

IPC: H01L49/02 ,  H01L29/49 ,  H01L51/05 ,  H01L29/78 ,  H01L21/02 ,  H01L29/40 ,  H01L27/11507 ,  H01L27/1159

Abstract: Disclosed are a thin film structure and an electronic device including the same. The disclosed thin film structure includes a dielectric material layer between a first material layer and a second material layer. The dielectric material layer includes a dopant in a matrix material having a fluorite structure. The dielectric material layer is uniformly doped with a low concentration of the dopant, and has ferroelectricity.

公开(公告)号：US20210296465A1

公开(公告)日：2021-09-23

申请号：US17173604

申请日：2021-02-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehwan MOON ,  Keunwook SHIN ,  Jinseong HEO

IPC: H01L29/51 ,  H01L29/08 ,  H01L29/06

Abstract: Disclosed are a semiconductor device and a capacitor which have relatively less leakage current. The semiconductor device includes a semiconductor layer, an oxide layer disposed on the semiconductor layer, and a metal layer disposed on the oxide layer, and a hydrogen concentration in the oxide layer is about 0.7 at % or more.