11.
    发明专利
    未知

    公开(公告)号:NO167341C

    公开(公告)日:1991-10-23

    申请号:NO833922

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK

    公开(公告)号:DE3380574D1

    公开(公告)日:1989-10-19

    申请号:DE3380574

    申请日:1983-10-28

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK

    公开(公告)号:GB2133188B

    公开(公告)日:1986-12-10

    申请号:GB8328893

    申请日:1983-10-28

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    15.
    发明专利
    未知

    公开(公告)号:BR8305967A

    公开(公告)日:1984-06-05

    申请号:BR8305967

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK

    公开(公告)号:GB2133188A

    公开(公告)日:1984-07-18

    申请号:GB8328893

    申请日:1983-10-28

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

Patent Agency Ranking