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公开(公告)号:KR880000577B1
公开(公告)日:1988-04-15
申请号:KR830000173
申请日:1983-01-18
Applicant: TANDEM COMPUTERS INC
Inventor: HUMPREY RICHARD A , FISHER STEVEN D , WIERENGA STEVEN W , SJOSTEDT JON
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公开(公告)号:FI830151L
公开(公告)日:1983-07-20
申请号:FI830151
申请日:1983-01-17
Applicant: TANDEM COMPUTERS INC
Inventor: HUMPHREY RICHARD ANTHONY , FISHER STEVEN DEREK , WIERENGA STEVEN DEREK , SJOSTEDT JON
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公开(公告)号:FI79620C
公开(公告)日:1990-01-10
申请号:FI830151
申请日:1983-01-17
Applicant: TANDEM COMPUTERS INC
Inventor: HUMPHREY RICHARD ANTHONY , FISHER STEVEN DEREK , WIERENGA STEVEN DEREK , SJOSTEDT JON
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公开(公告)号:FI79620B
公开(公告)日:1989-09-29
申请号:FI830151
申请日:1983-01-17
Applicant: TANDEM COMPUTERS INC
Inventor: HUMPHREY RICHARD ANTHONY , FISHER STEVEN DEREK , WIERENGA STEVEN DEREK , SJOSTEDT JON
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公开(公告)号:CA1203027A
公开(公告)日:1986-04-08
申请号:CA419694
申请日:1983-01-18
Applicant: TANDEM COMPUTERS INC
Inventor: HUMPHREY RICHARD A , FISHER STEVEN D , WIERENGA STEVEN W , SJOSTEDT JON
Abstract: A memory system for a computer detects data errors, address errors and operation errors to increase the reliability of data stored in the memory system. Address errors are detected by encoding address parity information into the data check field of each memory location. A signal is generated in each memory module indicating the status of operations of that memory module and is transmitted to the processor subsystem of the computer for comparison with a signal indicating the status of operations of the processor subsystem to insure that all memory modules and the memory control in the processor are receiving the same commands.
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公开(公告)号:BR8300237A
公开(公告)日:1983-10-18
申请号:BR8300237
申请日:1983-01-18
Applicant: TANDEM COMPUTERS INC
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