公开(公告)号：AU7052696A

公开(公告)日：1997-01-16

申请号：AU7052696

申请日：1996-10-31

Applicant: TANDEM COMPUTERS INC

Inventor： MIROV RUSSELL N ,  LE DUC NGOC ,  MIKALAUSKAS FRANK ,  GREBENKEMPER C JOHN ,  KWAN KINYING

IPC: G06F1/12 ,  G06F1/06 ,  G06F11/16 ,  H03K5/15 ,  H03L7/00 ,  H03H5/00 ,  H03L7/24

Abstract: A clock generator system includes two separate, similarly structured clock generator units, operating in lock-step unison, and with the digital clock signal outputs of one of the generator units distributed to the sync, clocked devices and to an error detection circuit, that also receives the digital clock signals from the other clock generator unit for comparison with one another. In the event an error being detected, an error detection circuit produces an error signal to halt operation of the system with which the clock generator system is used, and to reset the clock generator.

公开(公告)号：AU6614994A

公开(公告)日：1995-01-12

申请号：AU6614994

申请日：1994-07-01

Applicant: TANDEM COMPUTERS INC

Inventor： YIP LINDA Y ,  KWAN KINYING

IPC: G06F1/10

Abstract: A master clock signal, used to.operate the clock devices (e.g., flip flops) formed on an integrated circuit chip, includes first and second clock paths. The first clock path is a linear trunk having laterally extending tributaries. The clock trunk is driven, through buffer circuits, at both ends with the master clock, and the internal devices coupled to the tributaries to receive the clock signal. The second path comprises a closed loop formed proximate the periphery of the integrated circuit chip. Clock buffer circuitry receives the master clock signal and apply that master clock signal to two points on the closed loop path. The closed loop path is used to communicate the master clock to only the input/output devices, i.e., those that receive data and/or informational signals from an external source, or those communicate such signals to a destination external to the integrated circuit.

公开(公告)号：AU6614894A

公开(公告)日：1995-01-12

申请号：AU6614894

申请日：1994-07-01

Applicant: TANDEM COMPUTERS INC

Inventor： MIROV RUSSELL N ,  KWAN KINYING ,  GREBENKEMPER C JOHN ,  MIKALAUSKAS FRANK ,  LE DUC NGOC

IPC: G06F1/12 ,  G06F1/06 ,  G06F11/16 ,  H03K5/15 ,  H03L7/00 ,  H03L7/24

Abstract: A clock generator system includes two separate, similarly structured clock generator units, operating in lock-step unison, and with the digital clock signal outputs of one of the generator units distributed to the sync, clocked devices and to an error detection circuit, that also receives the digital clock signals from the other clock generator unit for comparison with one another. In the event an error being detected, an error detection circuit produces an error signal to halt operation of the system with which the clock generator system is used, and to reset the clock generator.