公开(公告)号：DE69403028D1

公开(公告)日：1997-06-12

申请号：DE69403028

申请日：1994-06-27

Applicant: TANDEM COMPUTERS INC

Inventor： YIP LINDA Y ,  KWAN KINYING

IPC: G06F1/10

Abstract: A master clock signal, used to.operate the clock devices (e.g., flip flops) formed on an integrated circuit chip, includes first and second clock paths. The first clock path is a linear trunk having laterally extending tributaries. The clock trunk is driven, through buffer circuits, at both ends with the master clock, and the internal devices coupled to the tributaries to receive the clock signal. The second path comprises a closed loop formed proximate the periphery of the integrated circuit chip. Clock buffer circuitry receives the master clock signal and apply that master clock signal to two points on the closed loop path. The closed loop path is used to communicate the master clock to only the input/output devices, i.e., those that receive data and/or informational signals from an external source, or those communicate such signals to a destination external to the integrated circuit.

公开(公告)号：AU667781B2

公开(公告)日：1996-04-04

申请号：AU6614994

申请日：1994-07-01

Applicant: TANDEM COMPUTERS INC

Inventor： YIP LINDA Y ,  KWAN KINYING

IPC: G06F1/10

Abstract: A master clock signal, used to.operate the clock devices (e.g., flip flops) formed on an integrated circuit chip, includes first and second clock paths. The first clock path is a linear trunk having laterally extending tributaries. The clock trunk is driven, through buffer circuits, at both ends with the master clock, and the internal devices coupled to the tributaries to receive the clock signal. The second path comprises a closed loop formed proximate the periphery of the integrated circuit chip. Clock buffer circuitry receives the master clock signal and apply that master clock signal to two points on the closed loop path. The closed loop path is used to communicate the master clock to only the input/output devices, i.e., those that receive data and/or informational signals from an external source, or those communicate such signals to a destination external to the integrated circuit.

公开(公告)号：CA2126622A1

公开(公告)日：1995-01-03

申请号：CA2126622

申请日：1994-06-23

Applicant: TANDEM COMPUTERS INC

Inventor： YIP LINDA Y ,  KWAN KINYING

IPC: G06F1/10 ,  H01L23/64 ,  H01L23/498 ,  H01L23/50 ,  H01L23/66

Abstract: ON CHIP CLOCK SKEW CONTROL METHOD AND APPARATUS A master clock signal, used to operate the clock devices (e.g., flip flops) formed on an integrated circuit chip, includes first and second clock paths. The first clock path is a linear trunk having laterally extending tributaries. The clock trunk is driven, through buffer circuits, at both ends with the master clock, and the internal devices coupled to the tributaries to receive the clock signal. The second path comprises a closed loop formed proximate the periphery of the integrated circuit chip. Clock buffer circuitry receives the master clock signal and apply that master clock signal to two points on the closed loop path. The closed loop path is used to communicate the master clock to only the input/output devices, i.e., those that receive data and/or informational signals from an external source, or those communicate such signals to a destination external to the integrated circuit.

公开(公告)号：DE69403028T2

公开(公告)日：1997-09-25

申请号：DE69403028

申请日：1994-06-27

Applicant: TANDEM COMPUTERS INC

Inventor： YIP LINDA Y ,  KWAN KINYING

IPC: G06F1/10

Abstract: A master clock signal, used to.operate the clock devices (e.g., flip flops) formed on an integrated circuit chip, includes first and second clock paths. The first clock path is a linear trunk having laterally extending tributaries. The clock trunk is driven, through buffer circuits, at both ends with the master clock, and the internal devices coupled to the tributaries to receive the clock signal. The second path comprises a closed loop formed proximate the periphery of the integrated circuit chip. Clock buffer circuitry receives the master clock signal and apply that master clock signal to two points on the closed loop path. The closed loop path is used to communicate the master clock to only the input/output devices, i.e., those that receive data and/or informational signals from an external source, or those communicate such signals to a destination external to the integrated circuit.

公开(公告)号：AU6614994A

公开(公告)日：1995-01-12

申请号：AU6614994

申请日：1994-07-01

Applicant: TANDEM COMPUTERS INC

Inventor： YIP LINDA Y ,  KWAN KINYING

IPC: G06F1/10

Abstract: A master clock signal, used to.operate the clock devices (e.g., flip flops) formed on an integrated circuit chip, includes first and second clock paths. The first clock path is a linear trunk having laterally extending tributaries. The clock trunk is driven, through buffer circuits, at both ends with the master clock, and the internal devices coupled to the tributaries to receive the clock signal. The second path comprises a closed loop formed proximate the periphery of the integrated circuit chip. Clock buffer circuitry receives the master clock signal and apply that master clock signal to two points on the closed loop path. The closed loop path is used to communicate the master clock to only the input/output devices, i.e., those that receive data and/or informational signals from an external source, or those communicate such signals to a destination external to the integrated circuit.