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    13.
    发明专利
    未知

    公开(公告)号：AT246440T

    公开(公告)日：2003-08-15

    申请号：AT95942861

    申请日：1995-11-16

    Applicant: TESSERA INC

    Inventor： DISTEFANO THOMAS H ,  SMITH JOHN W

    IPC: H01L23/36 ,  H01L23/367 ,  H01L23/40 ,  H05K7/20 ,  H01L23/433 ,  H01L25/065

    Abstract: A thermal connector for conducting heat from microelectronic components such as semiconductor chips to a heat sink. The connector includes a large number of flexible thermal conductors desirably formed as elongated "S"-shaped strips or ribbons. The conductors can flex to accommodate tolerances in the assembly and displacement of the components caused by thermal expansion. The conductors may have relatively thin neck sections to increase the flexibility of the conductors, The connector may be fabricated by a process which includes fabrication of the conductors as flat strips, bonding of the conductors to a pair of opposed planar sheets and vertically moving the sheets away from one another to expand the conductors vertically to their final three-dimensional configuration.

    Method of encapsulating a semiconductor package
    15.
    发明专利
    Method of encapsulating a semiconductor package 未知

    公开(公告)号：AU2063097A

    公开(公告)日：1997-09-22

    申请号：AU2063097

    申请日：1997-03-04

    Applicant: TESSERA INC

    Inventor： DISTEFANO THOMAS H ,  SMITH JOHN W ,  FJELSTAD JOSEPH ,  MITCHELL CRAIG S ,  KARAVAKIS KONSTANTINE

    IPC: H01L21/56 ,  H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L23/495 ,  H01L21/60

    Abstract: A method of encapsulating a semiconductor device. The encapsulation method includes a semiconductor chip package assembly having a spacer layer between a top surface of a sheet-like substrate and a contact bearing surface of a semiconductor chip, wherein the substrate has conductive leads thereon, the leads being electrically connected to terminals on a first end and bonded to respective chip contacts on a second end. Typically, the spacer layer is comprised of a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate. A flowable, curable encapsulant material is deposited around a periphery of the semiconductor chip after the attachment of the protective layer so as to encapsulate the leads. The encapsulant material is then cured. Typically, this encapsulation method is performed on a plurality of chip assemblies simultaneously.

    Fabrication of leads on semiconductor connection components
    16.
    发明专利
    Fabrication of leads on semiconductor connection components 未知

    公开(公告)号：AU5674296A

    公开(公告)日：1996-11-21

    申请号：AU5674296

    申请日：1996-05-03

    Applicant: TESSERA INC

    Inventor： FJELSTAD JOSEPH ,  SMITH JOHN W

    IPC: H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H05K3/40 ,  B32B31/12 ,  B32B31/04 ,  H05K3/02 ,  H05K3/36

    Abstract: A substantially continuous layer of a first metal such as copper is provided with strips of a second metal such as gold by selective electroplating of the second metal, or by applying separately formed strips such as lengths of wire. A dielectric support layer is provided in contact with the first metal layer, and the first metal layer is etched to leave strips of the first metal contiguous with the strips of the second metal, thereby providing composite leads with the first and second metal strips connected in series. The process provides simple and economical methods of making microelectronic connection components with leads having a flexible, fatigue resistant lead portion formed from a precious metal. The leads may incorporate sections of round cross-sectional shape to facilitate engagement by a bonding tool during use of the component.

    Connecting multiple microelectronic elements with lead deformation
    19.
    发明专利
    Connecting multiple microelectronic elements with lead deformation 未知

    公开(公告)号：AU7242596A

    公开(公告)日：1997-04-09

    申请号：AU7242596

    申请日：1996-09-23

    Applicant: TESSERA INC

    Inventor： FARACI TONY ,  DISTEFANO THOMAS H ,  SMITH JOHN W

    IPC: H01L25/18 ,  H01L21/60 ,  H01L25/04 ,  H01L21/44 ,  H01L21/56

    Abstract: A plurality of separate semiconductor chips, each having a contact-bearing surface and contacts on such surface, are disposed in an array so that the contact-bearing surfaces face and define a first surface of the array. A flexible, dielectric sheet with terminals thereon overlies the first or contact bearing surface of the semiconductor chips. Elongated leads are disposed between the dielectric element and the semiconductor chips. Each lead has a first end connected to a terminal on the dielectric element, and a second end connected to a contact on a semiconductor chip in the array. All of the leads are formed simultaneously by moving the dielectric element and the array relative to one another to simultaneously displace all of the first ends of the leads relative to all of the second ends. The dielectric element is subdivided after the forming step so as to leave one region of the dielectric element connected to each chip and thereby form individual units each including one chip, or a small number of chips.

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