公开(公告)号：NL1004841C2

公开(公告)日：1999-01-26

申请号：NL1004841

申请日：1996-12-19

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHIU HIEN-TIEN ,  TSAI MING-HSING

IPC: C23C16/04 ,  C23C16/20 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768

公开(公告)号：NL1004840C2

公开(公告)日：1998-06-22

申请号：NL1004840

申请日：1996-12-19

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHEN TSAI-FU

IPC: H01L21/02 ,  H01L21/334 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/8239

Abstract: Mfg. low-leakage current electrode for LPCVD TiO film comprises: (i) preparing a semiconductor Si base; (ii) depositing TiO thin film on Si base; (iii) annealing TiO film; (iv) depositing top electrode layer on TiO film; and (v) performing 2nd anneal.

公开(公告)号：GB2320131A

公开(公告)日：1998-06-10

申请号：GB9625205

申请日：1996-12-04

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHEN TSAI-FU

IPC: C23C16/02 ,  C23C16/56 ,  H01G4/33 ,  C23C16/40 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/8242 ,  H01L27/108 ,  H01G4/10

Abstract: A process for fabricating Ta 2 O 5 films for capacitor dielectrics of semiconductor memory devices such as stacked DRAM having low leakage current characteristics comprises the steps of first preparing a semiconductor silicon substrate carrying e.g. an NH3-nitrided polysilicon electrode layer. A Ta 2 O 5 film is then deposited over the surface of the electrode layer. The deposited Ta 2 O 5 film is then annealed in a furnace in N 2 O gas at a temperature of about 800 {C for about 30 minutes. This post-deposition annealing procedure yields Ta 2 O 5 film for semiconductor memory device capacitor dielectrics having low leakage current, good reliability, and is particularly suitable for batch processing in conventional oxidation furnaces.

公开(公告)号：DE19702388A1

公开(公告)日：1998-01-08

申请号：DE19702388

申请日：1997-01-23

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHIU HIEN-TIEN ,  TSAI MING-HSING

IPC: C23C16/04 ,  C23C16/20 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L21/203 ,  H01L21/283

Abstract: An improved method of fabricating an aluminum plug using a selective chemical vapor deposition (CVD) procedure. A semiconductor component is first formed in a substrate having an insulating layer formed over the surface thereof. The insulating layer has a contact opening formed therein that exposes a conductive region of the semiconductor component. Then, a vacuum thermal annealing treatment is performed on the device substrate. Dimethylethylamine alane (DMEAA) is used as a precursor for then depositing an aluminum layer over the surface of the substrate, using a CVD procedure performed at a substrate temperature not exceeding 250 {C, for fabricating an aluminum plug in the contact opening. The aluminum plug is selectively deposited over the surface of the exposed conductive region, while relatively not deposited over the surface of the insulating layer.

公开(公告)号：GB2320128B

公开(公告)日：2001-11-14

申请号：GB9625144

申请日：1996-12-03

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHEN TSAI-FU

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/334 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/321

公开(公告)号：SG60028A1

公开(公告)日：1999-02-22

申请号：SG1996011582

申请日：1996-12-09

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHEN TSAI-FU

IPC: H01L21/321 ,  H01L21/4757

公开(公告)号：NL1004839A1

公开(公告)日：1998-06-22

申请号：NL1004839

申请日：1996-12-19

Applicant: UNITED MICROELECTRONICS CORP

Inventor： SUN SHI-CHUNG ,  CHEN TSAI-FU

IPC: C23C16/02 ,  C23C16/56 ,  H01G4/33 ,  C23C16/40 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/3105 ,  H01L29/94

Abstract: A process for fabricating electrodes for the capacitor dielectric of semiconductor memory devices with low leakage current characteristics is disclosed. The process comprises the steps of first depositing a titanium oxide film over a semiconductor silicon substrate. The deposited titanium oxide film is then annealed. A layer of tungsten nitride top electrode is then deposited on the annealed titanium oxide film. A second annealing procedure is then conducted to simulate post electrode high temperature process.