INTEGRATED SWITCH WITH RF TRANSFORMER CONTROL
    211.
    发明申请
    INTEGRATED SWITCH WITH RF TRANSFORMER CONTROL 审中-公开
    具有射频变压器控制的集成开关

    公开(公告)号:WO0250850A3

    公开(公告)日:2003-01-03

    申请号:PCT/FR0104136

    申请日:2001-12-20

    Abstract: The invention concerns a control circuit for controlling a power switch by means of a galvanic insulation transformer, the transformer being produced in the form of planar conductive windings on an insulating substrate (20) whereon are integrated passive components constituting a high frequency excitation oscillating circuit for a primary winding of the transformer, the transformer substrate being directly mounted on a wafer (24) whereon is mounted a circuit chip (40) integrating the power switch.

    Abstract translation: 本发明涉及一种用于通过电绝缘变压器控制功率开关的控制电路,该变压器以绝缘衬底(20)上的平面导电绕组的形式制造,其中是构成高频激励振荡电路的集成无源部件, 变压器的初级绕组,变压器基板直接安装在其上安装有集成电源开关的电路芯片(40)的晶片(24)上。

    DEEP INSULATING TRENCH AND METHOD FOR PRODUCTION THEREOF
    212.
    发明申请
    DEEP INSULATING TRENCH AND METHOD FOR PRODUCTION THEREOF 审中-公开
    深层绝缘固化剂及其生产方法

    公开(公告)号:WO02103772A2

    公开(公告)日:2002-12-27

    申请号:PCT/FR0202029

    申请日:2002-06-13

    CPC classification number: H01L21/76232 H01L21/31612 H01L21/76237 H01L21/764

    Abstract: The invention relates to a deep insulating trench, comprising side walls (11) and a base (10), embodied in a semiconductor substrate (1). The side walls (11) and the base (10) are coated with an electrically insulating material (12) which defines an empty cavity (13) and forms a plug (14) to seal the cavity (13). The side walls (11) are embodied with a neck (15) for determining the position of the plug (15) and a first section (16) which tapers out towards the neck (15) with increasing separation from the base (10). The above is particularly suitable for application in bipolar circuits and BiCMOS.

    Abstract translation: 本发明涉及一种深绝缘沟槽,包括实施在半导体衬底(1)中的侧壁(11)和底座(10)。 侧壁(11)和基座(10)涂覆有限定空腔(13)并形成密封空腔(13)的塞子(14)的电绝缘材料(12)。 侧壁(11)具有用于确定插头(15)的位置的颈部(15)和与基部(10)分离的方式朝向颈部(15)逐渐变细的第一部分(16)。 以上特别适用于双极电路和BiCMOS。

    METHOD FOR MAKING A STACK OF CAPACITORS, IN PARTICULAR FOR DIRECT ACCESS DYNAMIC MEMORIES
    214.
    发明申请
    METHOD FOR MAKING A STACK OF CAPACITORS, IN PARTICULAR FOR DIRECT ACCESS DYNAMIC MEMORIES 审中-公开
    用于制造电容器堆叠的方法,特别是直接访问动态记忆

    公开(公告)号:WO0135448A2

    公开(公告)日:2001-05-17

    申请号:PCT/FR0003153

    申请日:2000-11-10

    CPC classification number: H01L27/10852 H01L27/10817 H01L28/60

    Abstract: The invention concerns a method which consists in forming on a substrate (1) coated with a dielectric material layer (3) provided with a window (3a), a stack of successive layers alternately of germanium or SiGe alloy (4, 6, 8) and polycrystalline silicon (5, 7, 9); selective partial elimination of the germanium or SiGe alloy layers, to form an tree-like structure; forming a thin layer of dielectric material (10) on the tree-like structure; and coating the tree-like structure with polycrystalline silicon (11). The invention is useful for making dynamic random-access memories.

    Abstract translation: 本发明涉及一种方法,该方法包括在涂覆有设置有窗口(3a)的介电材料层(3)的基底(1)上,交替地具有锗或SiGe合金(4,6,8)的叠层, 和多晶硅(5,7,9); 选择性地部分消除锗或SiGe合金层,形成树状结构; 在树状结构上形成介电材料薄层(10); 并用多晶硅(11)涂覆树状结构。 本发明对于制作动态随机存取存储器是有用的。

    VERIFICATION OF DATA READ IN MEMORY
    215.
    发明申请
    VERIFICATION OF DATA READ IN MEMORY 审中-公开
    数据在内存中的读取验证

    公开(公告)号:WO2009071791A2

    公开(公告)日:2009-06-11

    申请号:PCT/FR2008052073

    申请日:2008-11-18

    CPC classification number: G06F21/606 G06F21/755

    Abstract: The invention relates to a method and a circuit for verifying data transferred between a circuit (21) and a processing unit (11), in which: the data originating from the circuit travels through a first temporary storage element (23) having a size representing an integer multiple of the size of data liable to be presented subsequently on a bus (27) of the processing unit; an address provided by the processing unit (11) destined for the circuit is stored temporarily in a second element (22); and the content of the first element is compared with a current data item (CDATA) originating from the circuit, at least when said data item corresponds to an address of a data item already present in this first element.

    Abstract translation: 本发明涉及用于验证在电路(21)和处理单元(11)之间传送的数据的方法和电路,其中:源自电路的数据通过第一临时存储元件(23) 在处理单元的总线(27)上易于呈现的数据的大小的整数倍; 由处理单元(11)提供给该电路的地址暂时存储在第二元件(22)中; 并且至少当所述数据项对应于已经存在于该第一元素中的数据项的地址时,将第一元素的内容与源自该电路的当前数据项(CDATA)进行比较。

    SWITCHED-MODE POWER SUPPLY REGULATION
    216.
    发明申请
    SWITCHED-MODE POWER SUPPLY REGULATION 审中-公开
    开关电源调节

    公开(公告)号:WO2006021726A3

    公开(公告)日:2007-10-04

    申请号:PCT/FR2005050646

    申请日:2005-08-04

    Inventor: BAILLY ALAIN

    CPC classification number: H02M3/33523 H02M1/32

    Abstract: The invention concerns a circuit (30) for detecting an overload in a load supplied by a switched-mode power supply, comprising: a first comparator (25) of a first voltage based on the supply voltage of the load relative to a first threshold (V FB ), supplying a regulating signal (CT) to a pulse generator (6) controlling the switched-mode power supply; a second comparator (31) of a second voltage relative to a second threshold (V OLV ), supplying a signal (OVL) indicating the presence of an overload; and means (C33, 34, 35, M35) for automatically controlling said second voltage by a third threshold (V INI ) lower than the second and higher than the first, and for deactivating the second comparator as long as said automatic control is maintained.

    Abstract translation: 本发明涉及一种用于检测由开关模式电源提供的负载中的过载的电路(30),包括:基于负载的电源电压相对于第一阈值的第一电压的第一比较器(25) 将调节信号(CT)提供给控制开关模式电源的脉冲发生器(6); 相对于第二阈值(V SB OLV )的第二电压的第二比较器(31),提供指示存在过载的信号(OVL); 以及用于将所述第二电压自动控制低于第二阈值并且高于第一阈值的第三阈值(V SB INI )并且用于长时间停用第二比较器的装置(C33,34,35,M35) 如所述自动控制被维护。

    ANTENNA FOR ELECTRONIC LABEL
    217.
    发明申请
    ANTENNA FOR ELECTRONIC LABEL 审中-公开
    电子标签天线

    公开(公告)号:WO2006108970A3

    公开(公告)日:2007-04-05

    申请号:PCT/FR2006000857

    申请日:2006-04-18

    Inventor: MANI CHRISTOPHE

    Abstract: The invention concerns an inductive element for forming an electromagnetic transponder antenna, comprising a first group of mutually parallel conductors (p1') coplanar in a first plane, a second group of mutually parallel conductors (p2') coplanar in a second plane parallel to the first plane, and an insulating material (52') separating the two groups of conductors, one end of each conductor of the first group being connected to one end of a conductor of the second group whereof the other end is connected to one end of another conductor of the first group, the connections between the conductors being conductive via holes (v) in the thickness of the insulating material.

    Abstract translation: 本发明涉及一种用于形成电磁应答器天线的感应元件,包括在第一平面内共面的第一组相互平行的导体(p1'),与第二平面平行的第二平面共面的第二组相互平行的导体(p2') 第一平面和分离两组导体的绝缘材料(52'),第一组的每个导体的一端连接到第二组的导体的一端,另一端连接到另一组的一端 第一组的导体,导体之间的连接是绝缘材料的厚度的导电通孔(v)。

    VOLTAGE-CONTROLLED OSCILLATOR COMPRISING A CIRCUIT FOR COMPENSATING FREQUENCY PULLING
    219.
    发明申请
    VOLTAGE-CONTROLLED OSCILLATOR COMPRISING A CIRCUIT FOR COMPENSATING FREQUENCY PULLING 审中-公开
    包含一个用于补偿频率拉回的电路的电压控制振荡器

    公开(公告)号:WO2004038909A3

    公开(公告)日:2004-06-17

    申请号:PCT/FR0303020

    申请日:2003-10-14

    Inventor: NAYLER PETER

    Abstract: The invention concerns a method for stabilizing the operation of a voltage-controlled oscillator (VCO) monitored by a phase locked loop (PLL), the voltage-controlled oscillator delivering a RF signal and receiving via at least one disturbance path a frequency harmonics component equal or close to that of the RF signal, capable of disturbing its operation by injection pulling effect. The invention is characterized in that the method comprises a step which consists in injecting into the voltage-controlled oscillator a signal for compensating the injection pulling effect, whereof the phase and amplitude are adjusted to as to neutralize the effects of the disturbance harmonics component. The invention is applicable in particular to IQ phase modulation in radiotelephony.

    Abstract translation: 本发明涉及一种用于稳定由锁相环(PLL)监测的压控振荡器(VCO)的操作的方法,该压控振荡器传送RF信号并且经由至少一个干扰路径接收频率谐波分量相等 或接近于射频信号的频率,能够通过注入拉动效应干扰其操作。 本发明的特征在于,该方法包括以下步骤:向压控振荡器注入用于补偿注入拉动效应的信号,其中,调整相位和振幅以中和干扰谐波分量的影响。 本发明特别适用于无线电话中的IQ相位调制。

    RADIO-FREQUENCY DEVICE WITH NULL OR QUASI-NULL INTERMEDIATE FREQUENCY MINIMIZING INTERFERING FREQUENCY MODULATION APPLIED TO AN INTEGRATED LOCAL OSCILLATOR
    220.
    发明申请
    RADIO-FREQUENCY DEVICE WITH NULL OR QUASI-NULL INTERMEDIATE FREQUENCY MINIMIZING INTERFERING FREQUENCY MODULATION APPLIED TO AN INTEGRATED LOCAL OSCILLATOR 审中-公开
    具有NULL或QUASI-NULL中频优化的无线电频率设备最小化干扰频率调制应用于集成的本地振荡器

    公开(公告)号:WO2004036750A3

    公开(公告)日:2004-06-10

    申请号:PCT/FR0302956

    申请日:2003-10-08

    CPC classification number: H04B1/30 H03L7/23

    Abstract: The invention concerns a device comprising on a common electronic chip frequency translation means (MX) connected to a main oscillator (VCOP). The main oscillator (VCOP) is incorporated in a main phase locked loop (PLL2) whereof the reference frequency is supplied by a voltage-regulated auxiliary oscillator (VCOA), itself incorporated in an auxiliary phase locked loop (PLL1) whereof the reference frequency is lower than the auxiliary oscillator frequency. The reference frequency (SRFP) of the main loop is lower than the main oscillator output frequency, higher than 10 times the frequency spacing of the channels referred to the main oscillator output frequency, and distant by a whole multiple from reception or transmission frequency of at least the main loop cutoff frequency.

    Abstract translation: 本发明涉及一种包括在连接到主振荡器(VCOP)的公共电子芯片频率转换装置(MX)上的装置。 主振荡器(VCOP)被集成在主锁相环(PLL2)中,其参考频率由调压辅助振荡器(VCOA)提供,其自身并入辅助锁相环(PLL1),参考频率为 低于辅助振荡器频率。 主回路的参考频率(SRFP)低于主振荡器输出频率,高于主振荡器输出频率的通道的频率间隔的10倍,并且距离接收或传输频率的整数倍 最小主循环截止频率。

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