公开(公告)号：WO2004036750A3

公开(公告)日：2004-06-10

申请号：PCT/FR0302956

申请日：2003-10-08

Applicant: ST MICROELECTRONICS SA ,  CATHELIN PHILIPPE

Inventor： CATHELIN PHILIPPE

IPC: H03L7/23 ,  H04B1/30 ,  H04B1/10

CPC classification number: H04B1/30 ,  H03L7/23

Abstract: The invention concerns a device comprising on a common electronic chip frequency translation means (MX) connected to a main oscillator (VCOP). The main oscillator (VCOP) is incorporated in a main phase locked loop (PLL2) whereof the reference frequency is supplied by a voltage-regulated auxiliary oscillator (VCOA), itself incorporated in an auxiliary phase locked loop (PLL1) whereof the reference frequency is lower than the auxiliary oscillator frequency. The reference frequency (SRFP) of the main loop is lower than the main oscillator output frequency, higher than 10 times the frequency spacing of the channels referred to the main oscillator output frequency, and distant by a whole multiple from reception or transmission frequency of at least the main loop cutoff frequency.

Abstract translation: 本发明涉及一种包括在连接到主振荡器（VCOP）的公共电子芯片频率转换装置（MX）上的装置。 主振荡器（VCOP）被集成在主锁相环（PLL2）中，其参考频率由调压辅助振荡器（VCOA）提供，其自身并入辅助锁相环（PLL1），参考频率为 低于辅助振荡器频率。 主回路的参考频率（SRFP）低于主振荡器输出频率，高于主振荡器输出频率的通道的频率间隔的10倍，并且距离接收或传输频率的整数倍 最小主循环截止频率。

公开(公告)号：FR2892577A1

公开(公告)日：2007-04-27

申请号：FR0510767

申请日：2005-10-21

Applicant: ST MICROELECTRONICS SA

Inventor： CATHELIN PHILIPPE ,  GRASSET JEAN CHARLES

IPC: H04B1/40 ,  H04Q7/32

Abstract: L'étage radiofréquence comprend une cellule multiplicatrice analogique (CLM) possédant des moyens d'entrée (E1A, Elb) pour recevoir un courant d'entrée comportant une composante continue et une composante dynamique radiofréquence, une source de courant commandable (SC) pour délivrer un courant de commande continu, des moyens de multiplication en courant (T1A, T1B, T2A, T2B) générant un courant de sortie dont la composante dynamique radiofréquence est égale au produit de la composante dynamique du courant d'entrée par un coefficient multiplicateur dépendant du rapport entre une valeur proportionnelle à celle du courant de commande continu (2*IGAIN) et la valeur de la composante continue (IMIXDC) du courant d'entrée, des moyens de sortie pour délivrer le courant de sortie; et une cellule analogique d'aiguillage de courant (CLA) possédant des moyens d'entrée reliés aux moyens de sortie de la cellule multiplicatrice, une source de tension commandable (ST) pour délivrer une tension de commande et des moyens d'aiguillage (T4A, T5A, T4B, T5B) aptes à aiguiller une partie du courant d'entrée vers des moyens de sortie de la cellule d'aiguillage en fonction de la valeur de la tension de commande.

公开(公告)号：FR2837999A1

公开(公告)日：2003-10-03

申请号：FR0203806

申请日：2002-03-27

Applicant: ST MICROELECTRONICS SA

Inventor： CATHELIN PHILIPPE ,  GRASSET JEAN CHARLES

IPC: H03F1/30 ,  H03F1/32 ,  H03K17/14 ,  H04Q7/32

Abstract: The method subjects the product of static collector current (1c) and the emitter resistance (RE) to a predetermined reference voltage (Vref) whose value is equal, within a tolerance, to 13 mV at the temperature of 27 degrees C. The reference voltage is delivered by a generator (GT) of type proportional to the absolute temperature. It is observed that this reference voltage allows for an extremely large value of point of interception of order 3 (IIP3) and provides very good linearity. The electronic device implementing the method comprises an input receiving a signal (+Vin), a coupling capacitor (C), a bipolar transistor (BIP) functioning in class A, the emitter resistor (RE), the reference voltage generator (GT), and an enslave loop (MAS) connected between the emitter and the base of the bipolar transistor for subjecting the product of the collector current and the emitter resistance to the reference voltage. The output impedance of the enslave loop (MAS) is high with respect to the impedance viewed from the base of the transistor, for example 100 times higher. The gain of the enslave loop (MAS) at the frequency of useful signal and at the frequency difference (delta)f between two tones in an intermodulation test is small compared to unity, for example equal to 1/100. The enslave loop (MAS) comprises a differential amplifier, that is a comparator (CMP) whose first input is connected to the emitter of the transistor, the second input to the reference voltage generator, and whose output is connected to the gate of a MOS transistor (T). The MOS transistor (T) is connected between the supply voltage (Vdd) and the base of the bipolar transistor. The device is implemented in the form of an integrated circuit. A distant terminal in a wireless communication system, in particular mobile telephone, incorporates the radio-frequency reception stage comprising the device as claimed.

公开(公告)号：FR2867632A1

公开(公告)日：2005-09-16

申请号：FR0402596

申请日：2004-03-12

Applicant: ST MICROELECTRONICS SA

Inventor： POUSSET FABIEN ,  GRASSET JEAN CHARLES ,  CATHELIN PHILIPPE

IPC: H03F1/06 ,  H03F1/32 ,  H03F3/19 ,  H03F3/24 ,  H03K5/01 ,  H04B7/00

Abstract: The circuit has two inputs receiving respective signal components of a RF differential signal. The respective inputs are connected to an emitter and a base of a bipolar transistor (31) such that a collector of the transistor generates in the output, a current proportional to the difference of the components. The transistor is biased in order to discharge an emitter current sufficient for permitting linear conversion of the signal. An independent claim is also included for a RF signal transmission circuit comprising a differential to non differential signal conversion circuit in a communication system.

公开(公告)号：FR2845840A1

公开(公告)日：2004-04-16

申请号：FR0212743

申请日：2002-10-14

Applicant: ST MICROELECTRONICS SA

Inventor： CATHELIN PHILIPPE

IPC: H03L7/23 ,  H04B1/30 ,  H03L7/185 ,  H04Q7/32

Abstract: A zero IF (Intermediate Frequency) radio has a single chip (PC) with main phase locked loop (PLL2) reference frequency from a lower frequency voltage controlled auxiliary phase locked loop (PLL1) and main loop reference frequency (SRFP) below the main oscillator frequency, ten times higher than the channel frequency spacing and separated by an integer multiple of the transmit / receive frequency (SRFA) from the main loop cut off frequency. Includes an Independent claim for the use of the component in a cellular mobile phone.

公开(公告)号：FR2814607A1

公开(公告)日：2002-03-29

申请号：FR0012221

申请日：2000-09-26

Applicant: ST MICROELECTRONICS SA

Inventor： GRASSET JEAN CHARLES ,  CATHELIN PHILIPPE ,  LENZ KUNO

IPC: H03D7/14 ,  H03D7/00

Abstract: The mixer comprises an input intermediate-frequency (IF) stage (10), and a stage for the frequency shifting and output (20) delivering the radio-frequency differential-output signals (RFN,RFP). The biasing network (35) of the output stage comprises a constant current source (10) connected in parallel with a transistor (P3) of a current-mirror (M), whose other transistor (P2) is connected to a transisstor (P1) of a current source (11) of the input stage, and a resistor (R0) connected in series with two diodes (D1,D2) between the biasing node (14) and the ground. The transistors (P1,P2,P3) are of p-MOS type. The input stage (10) is with variable stationary-state current. The constant current source (10) is of bandgap type to ensure a constant voltage on the resistor (R0). The supply voltage (Vdd) is relatively low, e.g. 2.7 V. The input stage (10) comprises, as in prior device, a bipolar transistor (T1), a resistor (RE) connected between the emitter and the ground, a capacitor (CF) for the input of intermediate-frequency signal (IF), a current source (11) with a transistor (P1), a comparator (12), and a variable-voltage source (13). The collector of transistor (T1) delivers the intermediate-frequency signal (IF') with adjusted stationary-state level to the output stage. The output stage comprises a differential pair of bipolar transistors (TN,TP), capacitors (CN,CP) for the input of local-oscillator signals (LON,LOP) phase-shifted by 180 deg. and resistors (RN,RP) connecting the bases of transistors to the biasing node.

公开(公告)号：FR3056331B1

公开(公告)日：2018-10-26

申请号：FR1658771

申请日：2016-09-19

Applicant: ST MICROELECTRONICS SA

Inventor： MONROY AGUIRRE AGUSTIN ,  BERTRAND GUILLAUME ,  CATHELIN PHILIPPE ,  PAULIN RAPHAEL

IPC: H01L21/335 ,  H01L21/762

公开(公告)号：FR3056331A1

公开(公告)日：2018-03-23

申请号：FR1658771

申请日：2016-09-19

Applicant: ST MICROELECTRONICS SA

Inventor： MONROY AGUIRRE AGUSTIN ,  BERTRAND GUILLAUME ,  CATHELIN PHILIPPE ,  PAULIN RAPHAEL

IPC: H01L21/335 ,  H01L21/762

Abstract: Le dispositif électronique intégré comporte un substrat de type silicium sur isolant, au moins un transistor (TR) réalisé dans et sur le film semi-conducteur (1) du substrat et comportant une région de drain (D) et une région de source (S) d'un premier type de conductivité, une région de substrat (5) d'un deuxième type de conductivité située sous une région de grille, et des zones de prise de contact sur les régions de source (S), de grille (G) et de drain (D). Le transistor (TR) comprend en outre une région d'extension (6) prolongeant latéralement la région de substrat au delà des régions de source (S) et de drain (D) en revenant border à contact la région de source (S) par une région de bordure (61) ayant le premier type de conductivité, de façon à connecter électriquement la région de source et la région de substrat.

公开(公告)号：FR2814607B1

公开(公告)日：2003-02-07

申请号：FR0012221

申请日：2000-09-26

Applicant: ST MICROELECTRONICS SA

Inventor： GRASSET JEAN CHARLES ,  CATHELIN PHILIPPE ,  LENZ KUNO

IPC: H03D7/14 ,  H03D7/00

Abstract: A mixer including a stage for inputting a voltage signal to be shifted and a shift and output stage for providing frequency-shifted signals, a biasing network of the output stage including, between a high supply and a biasing node, a constant current source in parallel with an output element of a current mirror, an input element of which receives a bias order from the input stage.

公开(公告)号：FR2892577B1

公开(公告)日：2008-01-25

申请号：FR0510767

申请日：2005-10-21

Applicant: ST MICROELECTRONICS SA

Inventor： CATHELIN PHILIPPE ,  GRASSET JEAN CHARLES

IPC: H04B1/40 ,  H04Q7/32

Abstract: The device has a radiofrequency stage (ETV) with a variable gain/attenuation and with an analog multiplication cell (CLM) having a pair of inputs (E1A, E1B) receiving an input current comprising a DC component (IMIXDC) and a dynamic radiofrequency component (iin). The cell has a current source (SC) delivering a DC control current of 2*IGAIN. The cell has a current multiplication unit having transistors (T1A, T1B) connected between the inputs and a supply terminal (Vdd). The cell delivers an output current with a DC component equal to IGAIN and a dynamic radiofrequency component (iout). An independent claim is also included for a method for controlling a radiofrequency stage, with variable gain/attenuation, of an electronic device.