公开(公告)号：EP0703082A2

公开(公告)日：1996-03-27

申请号：EP95306606.5

申请日：1995-09-20

Applicant: Compaq Computer Corporation

Inventor： Plesinger, Boris

IPC: B41J2/14

CPC classification number: B41J2/14209 ,  B41J2002/14362 ,  B41J2202/03

Abstract: The present invention provides a removable orifice plate securing structure for use in conjunction with a conventional ink jet printer printhead assembly (10). The orifice plate securing structure comprises an orifice plate mounting member (32) having a rear end portion (36) disposed in an opposing relationship with the front end surface (18) of the printhead body portion (12), a front side surface (38) and an opening (40) extending outwardly from the rear end portion to the front side surface. The orifice plate mounting member (32) is configured to secure the orifice plate (20) removably between the front side surface (38) of the orifice plate mounting member and the front end surface (18) of the printhead body portion in an operative alignment position with the ink receiving chambers (16) in the printhead body portion (12). The opening (40) is configured to allow ink from the ink discharge orifices (22) in the orifice plate (20) to pass outwardly from the orifice plate mounting member. The orifice plate securing structure also comprises a securing means (34) for removably securing the orifice plate mounting member (32) and the orifice plate (20) to the printhead body portion (12).

Abstract translation: 本发明提供了一种可拆卸的孔板固定结构，用于与传统的喷墨打印机打印头组件（10）结合使用。 该孔板固定结构包括孔板安装部件（32），该孔板安装部件具有以与打印头主体部分（12）的前端表面（18）相对的关系布置的后端部分（36），前侧表面 ）以及从后端部分向前侧表面向外延伸的开口（40）。 孔板安装构件32构造成将孔板20可拆卸地固定在孔板安装构件的前侧表面38和打印头主体部分的前端表面18之间， 与打印头主体部分（12）中的墨水容纳室（16）定位。 开口（40）构造成允许来自孔板（20）中的油墨排出孔（22）的油墨从孔板安装构件向外传送。 孔板固定结构还包括用于将孔板安装构件（32）和孔板（20）可拆卸地固定到打印头主体部分（12）的固定装置（34）。

公开(公告)号：EP0520705B1

公开(公告)日：1996-01-31

申请号：EP92305657.6

申请日：1992-06-19

Applicant: Compaq Computer Corporation

Inventor： Lantz, Kurt C. ,  Hess, Randall L.

IPC: G06F1/00

CPC classification number: G06F1/3218 ,  G06F21/31 ,  G06F21/84 ,  G09G2330/021

公开(公告)号：EP0398188B1

公开(公告)日：1996-01-31

申请号：EP90108939.1

申请日：1990-05-11

Applicant: Compaq Computer Corporation

Inventor： Windsor, James A. ,  Hamid, Mustafa Ali ,  Thoma, Roy E. III ,  Paschal, James P. ,  Felcman, Francis A.

IPC: G11C5/00 ,  H05K7/02 ,  G11C5/14 ,  H05K7/14

CPC classification number: H05K7/023 ,  G11C5/00 ,  G11C5/025 ,  G11C5/143 ,  G11C8/00 ,  H05K1/141 ,  H05K7/1459

公开(公告)号：EP0616281A3

公开(公告)日：1996-01-17

申请号：EP94301986.9

申请日：1994-03-21

Applicant: Compaq Computer Corporation

Inventor： Lin, David S ,  Schneider, Michael E.

IPC: G06F1/26 ,  G01R31/36 ,  H02J7/10

CPC classification number: G06F1/263 ,  G01R31/3655 ,  H02J7/0004 ,  H02J7/0077 ,  Y10S320/21

Abstract: A battery pack for a computer system including static memory to maintain battery operating parameters and charge information, a real time clock (RTC) for measuring periods of non-use of the battery and a communication means to exchange the battery information with a microcontroller located in the computer system. The static memory, RTC and communication means is preferably in the form of a single RAM/RTC chip. The battery pack also includes circuitry to maintain power to the RAM/RTC from the battery if AC power is not available. The microcontroller detects the presence of the battery and retrieves the present time from the RTC, a timestamp indicating time or removal of the battery and other operating parameters and charge information from the battery pack, and controls the charging functions of the battery accordingly. The microcontroller also updates the charge information of the battery pack while performing other housekeeping functions of a DC-DC converter. The microcontroller further controls a switch located in the charge path of the battery to control fast charging. Trickle charge is simulated by pulsing the switch at a predetermined duty cycle and period. The microcontroller may be placed in standby to conserve energy, while also monitoring the standby switch to pull the computer system out of standby mode if the standby switch is pressed. This allows the keyboard controller 21 to be shut off during standby mode to conserve energy.

公开(公告)号：EP0688130A2

公开(公告)日：1995-12-20

申请号：EP95303888.2

申请日：1995-06-06

Applicant: Compaq Computer Corporation

Inventor： Wallace, David B.

IPC: H04N1/40

CPC classification number: H04N1/4057 ,  B41J2202/10

Abstract: A method of producing, on a physical medium, a gradient tonal representation of an image and a printhead for producing the same. An input image is divided into first and second regions. First, continuously variable intensity level, continuous tone and second, discretely variable intensity level, half-tone portions of the representation which respectively correspond to the first and second regions of the image are then printed by depositing selected quantities of ink on the first and second portions of the physical medium such that each pixel thereof has an ink intensity level corresponding to the image intensity level for the corresponding one of the pixels of the first region of the image. The ink is deposited on the second portion of the physical medium by depositing a spot of ink having a first diameter on selected ones of the pixels of the second portion, depositing a spot of ink having a second diameter on others of the pixels of the second portion and depositing no ink on still others of the pixels of the second portion such that the second portion of the representation has the desired ink intensity level. The color of the ink ejected may be black, in which case, the gradient tonal representation produced thereby shall be a gray scale representation, or other color such as yellow, cyan or magenta.

Abstract translation: 在物理介质上产生图像的梯度色调表示和用于制造图像的打印头的方法。 输入图像被分成第一和第二区域。 首先，分别对应于图像的第一和第二区域的连续可变强度水平，连续色调和第二，离散可变强度水平，表示的半色调部分通过在第一和第二图像上沉积选定量的油墨而被印刷 物理介质的部分，使得其每个像素具有对应于图像的第一区域的相应一个像素的图像强度水平的墨水强度水平。 通过在第二部分的选定的像素上沉积具有第一直径的墨点，将油墨沉积在物理介质的第二部分上，将具有第二直径的墨点在第二部分的像素的另一个上沉积 并且在第二部分的像素的其余部分上没有油墨沉积，使得表示的第二部分具有期望的墨水强度水平。 喷出的墨的颜色可以是黑色，在这种情况下，由此产生的渐变色调表示为灰度表示，或其他颜色，如黄色，青色或品红色。 $$

公开(公告)号：EP0684593A1

公开(公告)日：1995-11-29

申请号：EP95303082.2

申请日：1995-05-05

Applicant: Compaq Computer Corporation

Inventor： Biggs, Kent E.

IPC: G09G5/00 ,  H04N1/393

CPC classification number: G06T3/40 ,  G09G5/391

Abstract: The stretching of bitmap images in a computer system is accomplished by stretching each row of a source bitmap and storing the pixel information associated with the stretched row in a buffer, typically in main memory. The pixel information is transferred multiple times to the memory location associated with the destination bitmap, these memory locations generally reside in either main memory or in the frame buffer. Each time the buffer is written to the destination bitmap, an error term is adjusted by a predetermined amount. When the value of the error term meets a predefined criteria, the next row of the source bitmap is stretched and stored in the buffer and the process is repeated.

Abstract translation: 计算机系统中的位图图像的拉伸通过拉伸源位图的每一行并将与拉伸行相关联的像素信息存储在通常在主存储器中的缓冲器中来实现。 像素信息被多次传送到与目的地位图相关联的存储器位置，这些存储单元通常位于主存储器或帧缓冲器中。 每当将缓冲器写入到目标位图时，将错误项目调整预定量。 当错误项的值满足预定义的标准时，源位图的下一行被拉伸并存储在缓冲器中，并重复该过程。

公开(公告)号：EP0681241A1

公开(公告)日：1995-11-08

申请号：EP95302965.9

申请日：1995-05-01

Applicant: Compaq Computer Corporation

Inventor： Jackson, Michael T. ,  Fry, Walter G. ,  Goodrum, Alan L.

IPC: G06F12/08

CPC classification number: G06F12/0811 ,  G06F12/0831

Abstract: A computer system which utilizes processor boards including a first level cache system integrated with the microprocessor, a second level external cache system and a third level external cache system. The second level cache system is a conventional, high speed, SRAM-based, writeback cache system. The third level cache system is a large, writethrough cache system developed using conventional DRAMs as used in the main memory subsystem of the computer system. The three cache systems are arranged between the CPU and the host bus in a serial fashion. Because of the large size of the third level cache, a high hit rate is developed so that operations are not executed on the host bus but are completed locally on the processor board, reducing the use of the host bus by an individual processor board. This allows additional processor boards to be installed in the computer system without saturating the host bus. The third level cache system is organized as a writethrough cache. However, the shared or exclusive status of any cached data is also stored. If the second level cache performs a write allocate cycle and the data is exclusive in the third level cache, the data is provided directly from the third level cache, without requiring an access to main memory, reducing the use of the host bus.

Abstract translation: 一种计算机系统，它利用处理器板包括与所述微处理器，第二级外部高速缓冲存储器系统和一个第三级外部高速缓冲存储器的系统集成在一起的第一阶缓存系统。该第二阶缓存系统是常规的，高速，SRAM为基础的，回写高速缓存 系统，该第三级高速缓存系统是使用传统的DRAM作为在计算机系统的主存储器子系统中使用开发的大，写式高速缓存系统，三个缓存系统被以串行方式在CPU和主总线之间布置。 由于大尺寸的第三级高速缓存的，具有很高的命中率是发达国家也是如此操作，不执行主机总线上，而是在处理器板上本地完成，由单独的处理器板减少使用主机总线。 这允许被安装在计算机系统中的附加处理器板不饱和主机总线。 第三级高速缓存系统被组织成直写式高速缓存。 然而，任何高速缓存的数据的共享或独占状态，因此存储。 如果第二级高速缓存执行写分配周期和数据是唯一在第三级高速缓存，所述数据被从第三级高速缓存直接提供，而不需要访问主存储器，减少使用主机总线。

公开(公告)号：EP0665491A2

公开(公告)日：1995-08-02

申请号：EP95300368.8

申请日：1995-01-20

Applicant: Compaq Computer Corporation

Inventor： Dalton, Scott W. ,  Metz, Doyne L.

IPC: G06F3/147

CPC classification number: G09G5/006 ,  G09G3/3611 ,  G09G2370/04 ,  G09G2370/042

Abstract: A method that identifies the type of LCD panel used in a portable computer system based on the frequency of the oscillator signal of the DC-to-AC inverter in the LCD panel. In this method, only one signal is routed from the LCD panel to the base unit of the portable computer system for the purpose of panel identification. The inverter oscillating signal is used to increment a counter during power on operations. A system counter, which is clocked by a system clock, is used to determine the number of system clocks needed for the panel identification counter to reach a predetermined count. That number is compared with the entries of a table, in which each entry corresponds to a type of LCD panel. In this manner, the type of LCD panel can be identified based on the frequency of the inverter signal. A corresponding entry in a second table is accessed to obtain a table entry for the identified LCD panel to a full table of LCD panel parameters. The table entry is stored in a predetermined location in the Video ROM. During the video power on portion of the BIOS, the video BIOS routines access the predetermined location in the Video ROM to obtain the parameters to properly initialize the video controller.

Abstract translation: 基于LCD面板中的DC-AC逆变器的振荡器信号的频率，识别在便携式计算机系统中使用的LCD面板的类型的方法。 在这种方法中，为了面板识别的目的，只有一个信号从LCD面板路由到便携式计算机系统的基本单元。 逆变器振荡信号用于在上电操作期间增加一个计数器。 由系统时钟计时的系统计数器用于确定面板识别计数器达到预定计数所需的系统时钟数。 该数字与表的条目进行比较，其中每个条目对应于LCD面板的类型。 以这种方式，可以基于逆变器信号的频率来识别LCD面板的类型。 访问第二表中的相应条目以获得用于所识别的LCD面板的表条目到LCD面板参数的整个表。 表条目存储在视频ROM中的预定位置。 在BIOS的视频通电部分期间，视频BIOS例程访问视频ROM中的预定位置以获得参数以适当地初始化视频控制器。

公开(公告)号：EP0480575B1

公开(公告)日：1995-08-02

申请号：EP91308034.7

申请日：1991-09-02

Applicant: Compaq Computer Corporation

Inventor： Carroll, Barry N. ,  Ho, Jean Howard

IPC: H02M3/335 ,  H03K17/08

CPC classification number: H02M1/34 ,  H02M3/33546 ,  H02M2001/346 ,  H03K17/08142 ,  Y02B70/1491

公开(公告)号：EP0664035A1

公开(公告)日：1995-07-26

申请号：EP93924908.0

申请日：1993-09-29

Applicant: Compaq Computer Corporation

Inventor： LANDRY, John, A.

IPC: G06F11 ,  G06F15

CPC classification number: G06F11/1417 ,  G06F9/4405 ,  G06F11/0724 ,  G06F11/0757 ,  G06F11/22 ,  G06F15/177

Abstract: A multiprocessor computer system includes fault tolerant power up logic for finding a functioning CPU to operate as logical CPU0. Each microprocessor has a physical location designation which remains constant. When the system is powered up, all of the CPUs except the CPU in physical slot 0 (CPU P0) are initially placed in an inactive sleep state. The microprocessor in physical location 0 performs its power on self test (POST), and if the CPU functions properly, the CPU is designated as logical CPU0 (CPU L0). The microprocessor then awakens the remaining CPUs and boots up the rest of the computer system. If CPU P0 is not functioning properly, after a given time period the system awakens the processor in the next physical location and repeats the process of testing the CPU. The process repeats until an operating microprocessor is found to perform the CPU L0 functions.