公开(公告)号：KR101194461B1

公开(公告)日：2012-10-24

申请号：KR1020110095649

申请日：2011-09-22

Applicant: 삼성전기주식회사

Inventor： 김용갑 ,  박종은 ,  문정호

IPC: H05K3/32 ,  H05K1/18

Abstract: PURPOSE: A printed circuit board and a manufacturing method thereof are provided to stably perform a plating process by electrically connecting a pad and a via for plating a recognition mark using an additional plated lead line. CONSTITUTION: A base substrate includes a first plating lead line(120) on one side thereof. An insulating layer(130) is formed on the base substrate. One side of the insulating layer contacts the base substrate. A second plating lead line(140) and a pad(150) are formed on the other side of the insulating layer. A via(160) electrically connects the pad and the first plating lead line.

Abstract translation: 目的：提供一种印刷电路板及其制造方法，以通过使用附加的电镀引线将电镀连接垫和用于电镀识别标记的通孔来稳定地进行电镀处理。 构成：基底基板包括在其一面上的第一电镀引线（120）。 绝缘层（130）形成在基底基板上。 绝缘层的一侧接触基底。 第二电镀引线（140）和焊盘（150）形成在绝缘层的另一侧上。 通孔（160）电连接焊盘和第一电镀引线。

公开(公告)号：KR1020120024288A

公开(公告)日：2012-03-14

申请号：KR1020100087125

申请日：2010-09-06

Applicant: 삼성전기주식회사

Inventor： 문정호 ,  오상혁

IPC: H05K3/18 ,  H05K3/42 ,  C25D5/08

CPC classification number: C25D7/123 ,  H01L2924/0002 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/0338 ,  H05K2203/1476 ,  H01L2924/00

Abstract: PURPOSE: A method for forming a coating layer of a printed circuit board is provided to form a copper coating layer of a uniform thickness by successively advancing a first coating process and a second coating process when manufacturing the printed circuit board. CONSTITUTION: A penetration hole is processed on CCL(Copper Clad Lamination)(10). A seed coating layer(20) is formed on the penetration hole. Resist(40) is spread on the CCL and seed coating layer. A dry film is exposed and developed on the seed coating layer. A first coating layer(50) is formed on the seed coating layer. A copper coating layer(60) is formed on the first coating layer. The resist and the seed coating layer remaining on the first coating layer are eliminated. A pattern is formed.

Abstract translation: 目的：提供一种形成印刷电路板的涂层的方法，通过在制造印刷电路板时连续进行第一涂布处理和第二涂布处理，形成均匀厚度的铜涂层。 构成：在CCL（铜包层）（10）处理穿孔。 在穿透孔上形成种子覆盖层（20）。 抗蚀剂（40）铺展在CCL和种皮涂层上。 将干膜在种皮包衣层上曝光和显影。 第一涂层（50）形成在种皮涂层上。 在第一涂层上形成铜涂层（60）。 残留在第一涂层上的抗蚀剂和种子包衣层被消除。 形成图案。

公开(公告)号：KR1020120024219A

公开(公告)日：2012-03-14

申请号：KR1020100086999

申请日：2010-09-06

Applicant: 삼성전기주식회사

Inventor： 문정호 ,  정광옥 ,  남효승

IPC: C25D7/00 ,  C25D5/02 ,  H05K3/18

CPC classification number: H05K3/0097 ,  C25D5/022 ,  H05K3/18 ,  H05K2201/09781

Abstract: PURPOSE: A substrate plating method and a circuit board manufacturing method using the same are provided to minimize plating deviation caused by the effect of a dummy area in a circuit board arranged on the perimeter of a panel substrate. CONSTITUTION: A circuit board manufacturing method comprise the steps of: preparing a panel substrate(5) divided into a circuit board area and a dummy area, calculating the area ratio of a circuit pattern in the circuit board area, determining the ratio of a plated area in the dummy area in consideration of a plating area ratio of the circuit board area, setting a plated part in the circuit board are and the dummy area, and electroplating the panel substrate to form the circuit pattern.

Abstract translation: 目的：提供一种基板镀覆方法和使用该方法的电路板制造方法，以最小化由布置在面板基板的周边上的电路板中的虚拟区域的影响引起的电镀偏差。 构成：一种电路板制造方法，包括以下步骤：制备划分为电路板区域和虚拟区域的面板基板（5），计算电路板区域中的电路图案的面积比，确定镀覆 考虑到电路板面积的电镀面积比，设置电路板中的电镀部分和虚拟区域，并且将面板基板电镀以形成电路图案，在虚拟区域中的面积。

公开(公告)号：KR101081588B1

公开(公告)日：2011-11-08

申请号：KR1020100075011

申请日：2010-08-03

Applicant: 삼성전기주식회사

Inventor： 문정호 ,  정광옥 ,  박원규 ,  남효승

IPC: H05K3/18 ,  H05K3/06

CPC classification number: H05K3/108 ,  H05K3/387 ,  H05K2203/1152 ,  H05K2203/1157

Abstract: PURPOSE: A method for forming plating layer and a method for manufacturing circuit board using the same are provided to prevent no-plating by removing an anti-corrosive material remaining in a primer resin. CONSTITUTION: In a method for forming plating layer and a method for manufacturing circuit board using the same, a metal film coated with a primer resin is provided in one side(S110). The primer resin layer is formed by using the illuminance of a metal film(S120). The metal film is laminated on the insulating layer so that the primer resin layer is attached to an insulating layer(S122). The metal film is removed through etching(S124). The primer resin layer is restored to remove the metal film of anti-corrosive material remaining the primer resin layer(S130). A circuit pattern is formed in the primer resin(S140).

Abstract translation: 目的：提供一种形成镀层的方法和使用该方法制造电路板的方法，以通过去除残留在底漆树脂中的防腐蚀材料来防止不镀。 构成：在形成镀层的方法和使用其的电路板的制造方法中，在一侧设置涂布有底漆树脂的金属膜（S110）。 底漆树脂层通过使用金属膜的照度形成（S120）。 将金属膜层叠在绝缘层上，使底漆树脂层附着在绝缘层上（S122）。 金属膜通过蚀刻去除（S124）。 恢复底漆树脂层以去除残留底漆树脂层的防腐蚀材料的金属膜（S130）。 在底漆树脂中形成电路图案（S140）。

公开(公告)号：KR101055455B1

公开(公告)日：2011-08-08

申请号：KR1020090117252

申请日：2009-11-30

Applicant: 삼성전기주식회사

Inventor： 이석원 ,  오상혁 ,  성기정 ,  문정호

IPC: H05K3/00 ,  H01L23/28

Abstract: 본 발명은 기판 제조용 캐리어 부재 및 이를 이용한 기판의 제조방법에 관한 것으로, 본 발명에 따른 기판 제조용 캐리어 부재는 양면에 금속층이 구비되어, 이단으로 적층된 2개의 절연층, 상기 절연층의 테두리를 두께방향으로 관통하도록 가공된 제1 홀 및 상기 제1 홀에 삽입되어 상기 2개의 절연층을 고정하는 고정부재를 포함하는 구성이며, 캐리어 부재의 구성요소를 최종적으로 생성되는 코어리스 기판의 절연층과 회로패턴으로 활용함으로써 코어리스 기판의 제조비용을 절약할 수 있는 장점이 있다.
인쇄회로기판, 캐리어 부재, 고정부재, 베이스 기판, 홀

公开(公告)号：KR1020110054884A

公开(公告)日：2011-05-25

申请号：KR1020090111681

申请日：2009-11-18

Applicant: 삼성전기주식회사

Inventor： 문정호 ,  손경진

IPC: H05K3/46 ,  H05K3/00

Abstract: PURPOSE: A carrier member for manufacturing a substrate and substrate manufacturing method using the same are provided to inject a gas into a hole to separate a buildup layer from the carrier member, thereby eliminating a routing process. CONSTITUTION: An insulating material(110) is laminated on one side or both sides of a base substrate(100). A releasing layer(120) whose size is smaller than the insulating material is arranged on one side of the insulating material. A metal layer(130) is arranged on one side of the releasing layer. A carrier member for manufacturing a substrate is provided by attaching the girth of the metal layer by the insulating material. A hole(150) penetrates a buildup layer and the carrier member after the buildup layer is formed on one side of the metal layer. The metal layer is separated from the releasing layer by injecting a gas into the hole.

Abstract translation: 目的：提供一种用于制造基板的载体部件和使用该载体的基板制造方法，以将气体注入孔中以将载置层与载体部件分离，从而消除了路由过程。 构成：将绝缘材料（110）层叠在基底（100）的一侧或两侧。 尺寸小于绝缘材料的释放层（120）布置在绝缘材料的一侧。 金属层（130）布置在释放层的一侧上。 通过用绝缘材料附着金属层的周长来提供用于制造基板的载体构件。 在金属层的一侧上形成积层之后，孔（150）穿透积层并且承载构件。 通过向孔中注入气体将金属层与释放层分离。

公开(公告)号：KR1020100049842A

公开(公告)日：2010-05-13

申请号：KR1020080108849

申请日：2008-11-04

Applicant: 삼성전기주식회사

Inventor： 고영관 ,  박진범 ,  문정호 ,  강명삼

IPC: H05K3/06 ,  H05K3/40

CPC classification number: H05K3/421 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/181 ,  H05K3/4038

Abstract: PURPOSE: A manufacturing method of a printed circuit board is provided to prevent the undercut by eliminating a flash etching process and a surface roughing process. CONSTITUTION: A base substrate(101) includes an insulating layer(102) and a first metal layer. The first metal layer is formed on the insulating layer. A window is formed by patterning the first metal layer. By etching the insulating layer exposed with the window, grooves(105a,105c) for a circuit and a blind via hole(106) are formed. A circuit pattern and the blind via are formed by filling a second metal layer in the groove for a circuit and the blind via hole.

Abstract translation: 目的：提供印刷电路板的制造方法，通过消除闪光蚀刻工艺和表面粗糙化处理来防止底切。 构成：基底（101）包括绝缘层（102）和第一金属层。 第一金属层形成在绝缘层上。 通过图案化第一金属层形成窗口。 通过蚀刻用窗口暴露的绝缘层，形成用于电路的凹槽（105a，105c）和盲孔（106）。 电路图案和盲孔通过在用于电路的凹槽和盲孔中填充第二金属层而形成。