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公开(公告)号：KR1020150058932A
公开(公告)日：2015-05-29
申请号：KR1020130142291
申请日：2013-11-21
Applicant: 한국전자통신연구원
Abstract: 본발명에따른바이어스회로는접지단자와제 1 노드사이에연결되는제 1 저항, 상기제 1 노드에연결되는드레인및 제 2 노드에연결되는소스를포함하는제 1 바이어스트랜지스터, 상기제 2 노드에연결되는드레인및 음전압전원단자에연결되는소스를포함하는제 2 바이어스트랜지스터, 상기접지단자에연결되는드레인및 제 3 노드에연결되는소스를포함하는제 3 바이어스트랜지스터, 그리고상기제 3 노드와음 전압전원단자사이에연결되는제 2 저항을포함하고, 상기제 1 바이어스트랜지스터의게이트는상기제 2 노드에연결되고, 상기제 2 바이어스트랜지스터의게이트는상기음 전압전원단자에연결되고, 상기제 3 바이어스트랜지스터의게이트는상기제 1 노드에연결되고, 게이트바이어스전압신호는상기제 3 노드를통해출력된다.
Abstract translation: 根据本发明的偏置电路包括连接在接地端子和第一节点之间的第一电阻器，包括连接到第一节点的漏极和连接到第二节点的源极的第一偏置晶体管， 第二偏置晶体管，其包括连接到第二节点的漏极和连接到负电压电源端子的源极;第三偏置晶体管，其包括连接到接地端子的漏极和连接到 第三节点和连接在第三节点和负电压电源端子之间的第二电阻器。 第一偏置晶体管的栅极连接到第二节点。 第二偏置晶体管的栅极连接到负电压电源端子。 第三偏置晶体管的栅极连接到第一节点。 栅极偏置电压信号通过第三个节点输出。
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公开(公告)号：KR1020140085678A
公开(公告)日：2014-07-08
申请号：KR1020120154072
申请日：2012-12-27
Applicant: 한국전자통신연구원
CPC classification number: G01S7/032 , G01S2007/027
Abstract: A radar transceiver module includes an RF circuit unit including an RF substrate and RF components; and a DC power circuit unit including a PCB substrate and DC power circuit components. The RF circuit unit and the DC power circuit unit are arranged to make the rear surfaces of the RF circuit unit and the DC power circuit to face each other and assembled to have partitioned spaces by using at least one blocking wall.
Abstract translation: 雷达收发器模块包括包括RF基板和RF部件的RF电路单元; 以及包括PCB基板和直流电力电路部件的直流电力电路单元。 RF电路单元和DC电力电路单元被布置成使得RF电路单元和DC电力电路的后表面彼此面对并且通过使用至少一个阻挡壁来组装以具有分隔空间。
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公开(公告)号：KR1020140004417A
公开(公告)日：2014-01-13
申请号：KR1020120071931
申请日：2012-07-02
Applicant: 한국전자통신연구원
IPC: H03H11/24
CPC classification number: H03H11/24 , H01P1/22 , H03H7/24 , H03H11/245
Abstract: According to the present invention, a digital attenuator includes a first switching element connected between an RF input terminal and an RF output terminal, a first resistive element connected in parallel to the RF input terminal, a second resistive element connected in parallel to the RF output terminal and in series to the first resistive element, a third resistive element connected in parallel between the second resistive element and the first resistive element, a first capacitive element connected to a ground and in series to the second switching element, and a fourth resistive element connected to a positive power source and in parallel to the second switching element.
Abstract translation: 根据本发明，数字衰减器包括连接在RF输入端和RF输出端之间的第一开关元件，与RF输入端并联连接的第一电阻元件，与RF输出并联连接的第二电阻元件 并且串联连接到第一电阻元件，并联连接在第二电阻元件和第一电阻元件之间的第三电阻元件，连接到地并与第二开关元件串联的第一电容元件和第四电阻元件 连接到正电源并与第二开关元件并联连接。
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公开(公告)号：KR1020100025868A
公开(公告)日：2010-03-10
申请号：KR1020080084600
申请日：2008-08-28
Applicant: 한국전자통신연구원
IPC: H03F1/30
CPC classification number: H03F1/301 , H03F1/223 , H03F2200/447
Abstract: PURPOSE: A compensation bias circuit for compensating the variation of a threshold voltage, a temperature, and power and an amplifier using the same are provided to supply a compensated bias by connecting a transistor in parallel to a source terminal of an active bias transistor. CONSTITUTION: A compensation bias circuit includes an active gate bias unit, a first transistor(310) and a second transistor(320). The active gate bias unit drives an amplifier(110). The first transistor is connected in parallel to a source terminal of an active gate bias unit. The first transistor is connected to a first feedback resistor(311). The second transistor is connected between the source terminal of the active gate bias unit and the power supply terminal. The second transistor is connected to a second feedback resistor(321).
Abstract translation: 目的：提供用于补偿阈值电压，温度和功率的变化的补偿偏置电路以及使用其的放大器，以通过将晶体管并联连接到有源偏置晶体管的源极端来提供补偿的偏置。 构成：补偿偏置电路包括有源栅极偏置单元，第一晶体管（310）和第二晶体管（320）。 有源栅极偏置单元驱动放大器（110）。 第一晶体管并联连接到有源栅极偏置单元的源极端子。 第一晶体管连接到第一反馈电阻器（311）。 第二晶体管连接在有源栅极偏置单元的源极端子和电源端子之间。 第二晶体管连接到第二反馈电阻器（321）。
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公开(公告)号：KR1020090033617A
公开(公告)日：2009-04-06
申请号：KR1020070098737
申请日：2007-10-01
Applicant: 한국전자통신연구원
IPC: H05K1/16
CPC classification number: H05K1/162 , H01L2924/09701 , H05K1/0306 , H05K1/115 , H05K3/4038
Abstract: A vertical transition substrate having compensation capacitor and method for manufacturing the same are provided to improve the characteristic of insertion loss and return loss by setting the pad connected to the ground plane of vertical signal via. The pad(301) is formed in the dielectric layer of the lower position corresponding to the vertical signal via. The vertical ground vias(302) electrically connects the ground plane with pad. The substrate is formed with the low temperature co-fired ceramic substrate. The second dielectric layer formed on the pad is laminated on the first dielectric layer having the ground plane. The third dielectric layer of the first conductive pattern is laminated to on the second dielectric layer. The second conductive pattern and fourth dielectric layer are formed on the upper part of the third dielectric layer.
Abstract translation: 提供具有补偿电容器的垂直过渡基板及其制造方法，通过设置连接到垂直信号通孔的接地面的焊盘来提高插入损耗和回波损耗的特性。 衬垫（301）形成在对应于垂直信号通孔的较低位置的电介质层中。 垂直接地通孔（302）将接地平面与焊盘电连接。 基板由低温共烧陶瓷基板形成。 形成在焊盘上的第二电介质层被层压在具有接地层的第一电介质层上。 第一导电图案的第三电介质层层压到第二电介质层上。 第二导电图案和第四介电层形成在第三电介质层的上部。
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Patent Agency Ranking
公开(公告)号：KR1020070003137A
公开(公告)日：2007-01-05
申请号：KR1020050058884
申请日：2005-06-30
Applicant: 한국전자통신연구원
IPC: H05K13/04
CPC classification number: H01L21/67763 , B65G49/06 , H01L23/49833 , H01L24/48
Abstract: A packaged IC(Integrated Circuit) switch carrier apparatus using a coplanar wire-bond interconnection and a method thereof are provided to acquire a high isolation characteristic of an IC switch by connecting input/output terminals of the IC switch based on a coplanar wire-bond interconnection. A first signal pad(210) is located on input/output terminals of an IC switch and connects a signal. A first ground pad(209) is located on the input/output terminals of the IC switch and grounds the IC switch. A second signal pad(206) is located on input/output terminals of an IC switch carrier apparatus and connects a signal. A second ground pad(204) is located on the input/output terminals of the IC switch carrier apparatus and grounds the IC switch carrier apparatus. A connection unit connects the first signal pad(210) to the second signal pad(206), and connects the first ground pad(209) to the second ground pad(204). A ground unit grounds the second ground pad(204).
Abstract translation: 提供使用共面线接合互连的封装IC（集成电路）开关承载装置及其方法，以通过将IC开关的输入/输出端基于共面线接合来获得IC开关的高隔离特性 互连。 第一信号焊盘（210）位于IC开关的输入/输出端上并连接信号。 第一接地焊盘（209）位于IC开关的输入/输出端子上，并将IC开关接地。 第二信号焊盘（206）位于IC开关承载装置的输入/输出端上并连接信号。 第二接地焊盘（204）位于IC开关承载装置的输入/输出端上，并将IC开关承载装置接地。 连接单元将第一信号焊盘（210）连接到第二信号焊盘（206），并将第一接地焊盘（209）连接到第二接地焊盘（204）。 地面单元接地第二接地垫（204）。
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公开(公告)号：KR100636376B1
公开(公告)日：2006-10-19
申请号：KR1020050055854
申请日：2005-06-27
Applicant: 한국전자통신연구원
Abstract: A frequency multiplier with a series resonant reflector is provided to improve the output power and to reduce the size, by reflecting a signal regardless of high and low frequency with the series resonant reflector. In a frequency multiplier with a series resonant reflector(250), electric sources(200,210) provide the electric power to a frequency multiplying unit(240). An input DC blocking unit(220) removes the DC(Direct Current) component of signal having an inputted reference frequency component. An input matching unit(230) matches a signal having the reference frequency component. The frequency multiplying unit(240) receives the signal having the reference frequency component matched at the input matching unit(230), outputs the signal having reference frequency component and a signal having the harmonic component and amplifies the output by using the signal having the reference frequency component reflected from the series resonant reflector(250). The series resonant reflector(250) reflects the signal having the reference frequency component outputted from the frequency multiplying unit(240) with the frequency multiplying unit(240). An output matching unit(260) selects a signal having a predetermined first multiplying component among the signal having the harmonics component outputted from the frequency multiplying unit(240). An output DC blocking unit(270) removes the DC component of signal having a predetermined component selected at the output matching unit(260).
Abstract translation: 带串联谐振反射器的倍频器通过串联谐振反射器反射信号而不考虑高频和低频来提高输出功率并减小尺寸。 在具有串联谐振反射器（250）的倍频器中，电源（200,210）将电力提供给倍频单元（240）。 输入DC阻塞单元（220）去除具有输入参考频率分量的信号的DC（直流）分量。 输入匹配单元（230）匹配具有参考频率分量的信号。 倍频部（240）输入具有在输入匹配部（230）中匹配的基准频率成分的信号，输出具有基准频率成分的信号和具有高次谐波成分的信号，并使用具有该基准的信号 从所述串联谐振反射器（250）反射的高频分量。 串联谐振反射器（250）用倍频单元（240）反射从倍频单元（240）输出的具有参考频率分量的信号。 输出匹配单元（260）从具有从倍频单元（240）输出的具有谐波分量的信号中选择具有预定第一乘法分量的信号。 输出DC阻止单元（270）去除具有在输出匹配单元（260）处选择的预定分量的信号的DC分量。
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公开(公告)号：KR1020060009720A
公开(公告)日：2006-02-01
申请号：KR1020040058398
申请日：2004-07-26
Applicant: 한국전자통신연구원
CPC classification number: H03F1/3276 , H03F1/22 , H03F1/3241 , H03F1/3282
Abstract: 1. 청구범위에 기재된 발명이 속한 기술분야
본 발명은 전력 증폭을 위한 전치왜곡형 선형화 장치 및 그 방법에 관한 것임.
2. 발명이 해결하려고 하는 기술적 과제
본 발명은 입력신호의 크기에 따른 전력증폭기의 이득 왜곡(AM-AM)과 위상 왜곡(AM-PM)을 보상함으로써, 전력 증폭기의 선형성을 증가시키기 위한 전력 증폭을 위한 전치왜곡형 선형화 장치 및 그 방법을 제공하는데 그 목적이 있음.
3. 발명의 해결방법의 요지
본 발명은, 전력 증폭을 위한 전치왜곡형 선형화 장치에 있어서, 위상 및 이득 변환시 발생하는 삽입손실을 보상하기 위하여, 입력전력을 증가시키기 위한 증폭수단; 선형화 대상 장치의 위상변화 추이에 따라 선택적으로 바이어스 조건을 결정하여, 상기 증폭수단에서 증폭된 입력전력의 증가에 따라 위상을 증감시키기 위한 위상변환수단; 및 상기 위상변환수단에서 입력전력의 증가에 따라 감소되는 이득을 증가시키기 위한 이득변환수단을 포함한다.
4. 발명의 중요한 용도
본 발명은 전력 증폭기 등에 이용됨.
전치왜곡, 선형화, 이득 왜곡(AM-AM), 위상 왜곡(AM-PM)-
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公开(公告)号：KR1020160013636A
公开(公告)日：2016-02-05
申请号：KR1020140095668
申请日：2014-07-28
Applicant: 한국전자통신연구원
CPC classification number: H03F1/301 , H03F1/3205 , H03F1/56
Abstract: 본발명은증폭기의선형성을개선하기위하여증폭기단별게이트전압을다르게인가하는바이어스회로를통하여증폭기의선형성을개선하여높은출력전력에서높은품질의신호를출력해줄수 있으며, 바이어스회로가집적회로내에내장이가능하여추가적인외부전원회로가필요치않아소형증폭기모듈에효과적으로적용될수 있는, 질화갈륨집적회로를통한신호증폭기에관한것이다.
Abstract translation: 本发明涉及一种通过氮化镓集成电路的信号放大器，其可以通过改善放大器每个步长的栅极电压，通过偏置电路提高线性度来输出具有高输出功率的高质量信号，从而提高放大器的线性度 放大器; 并且可以有效地应用于小放大器，因为偏置电路可以嵌入在集成电路内部而不需要附加的外部电源电路。
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