公开(公告)号：US20170316940A1

公开(公告)日：2017-11-02

申请号：US15650686

申请日：2017-07-14

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Atsuki Fukazawa ,  Toshiharu Watarai

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/0337 ,  C23C16/345 ,  C23C16/45536 ,  C23C16/45553 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144

Abstract: A method of forming spacers for spacer-defined multiple pattering (SDMP), includes: depositing a pattern transfer film by PEALD on the entire patterned surface of a template using halogenated silane as a precursor and nitrogen as a reactant at a temperature of 200° C. or less, which pattern transfer film is a silicon nitride film; dry-etching the template using a fluorocarbon as an etchant, and thereby selectively removing a portion of the pattern transfer film formed on a top of a core material and a horizontal portion of the pattern transfer film while leaving the core material and a vertical portion of the pattern transfer film as a vertical spacer, wherein a top of the vertical spacer is substantially flat; and dry-etching the core material, whereby the template has a surface patterned by the vertical spacer on a underlying layer.

公开(公告)号：US20170133216A1

公开(公告)日：2017-05-11

申请号：US15414485

申请日：2017-01-24

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02

CPC classification number: H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/823431

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US09564309B2

公开(公告)日：2017-02-07

申请号：US14167904

申请日：2014-01-29

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02 ,  H01L21/311

CPC classification number: H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/823431

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

Abstract translation: 提供了通过原子层沉积（ALD）沉积氮化硅膜的方法和前体。 在一些实施方案中，硅前体包含碘配体。 当沉积到诸如FinFETS或其它类型的多栅极FET的三维结构上时，氮化硅膜可以具有相对均匀的垂直和水平部分的蚀刻速率。 在一些实施方案中，本公开的各种氮化硅膜具有小于具有稀释HF（0.5％）的热氧化物去除速率的一半的蚀刻速率。

公开(公告)号：US20150147483A1

公开(公告)日：2015-05-28

申请号：US14090750

申请日：2013-11-26

Applicant: ASM IP Holding B.V.

Inventor： Atsuki Fukazawa

IPC: C23C16/34 ,  C23C16/452 ,  C23C16/56 ,  C23C16/40

CPC classification number: C23C16/345 ,  C23C16/4554

Abstract: A method for forming a film on a patterned surface of a substrate by atomic layer deposition (ALD) processing includes: adsorbing onto a patterned surface a first precursor containing silicon or metal in its molecule; adsorbing onto the first-precursor-adsorbed surface a second precursor containing no silicon or metal in its molecule; exposing the second-precursor-adsorbed surface to an excited reactant to oxidize, nitride, or carbonize the precursors adsorbed on the surface of the substrate; and repeating the above cycle to form a film on the patterned surface of the substrate.

Abstract translation: 通过原子层沉积（ALD）处理在基板的图案化表面上形成膜的方法包括：在图案化表面上吸附分子中含有硅或金属的第一前体; 在其分子中吸附到第一前体吸附表面上的不含硅或金属的第二前体; 将第二前体吸附的表面暴露于被激发的反应物以氧化，氮化或碳化吸附在基底表面上的前体; 并重复上述循环以在衬底的图案化表面上形成膜。

公开(公告)号：US12230497B2

公开(公告)日：2025-02-18

申请号：US18092219

申请日：2022-12-31

Applicant: ASM IP Holding B.V.

Inventor： Aurélie Kuroda ,  Atsuki Fukazawa

IPC: H01L21/02

Abstract: Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process are provided. The methods may include: forming a topographically selective silicon oxide film by a plasma enhanced atomic layer deposition (PEALD) process or a cyclical plasma-enhanced chemical vapor deposition (cyclical PECVD) process. The methods may also include: forming a silicon oxide film either selectivity over the horizontal surfaces of a non-planar substrate or selectively over the vertical surfaces of a non-planar substrate.

公开(公告)号：US20230207309A1

公开(公告)日：2023-06-29

申请号：US18117729

申请日：2023-03-06

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Steven R.A. Van Aerde ,  Suvi Haukka ,  Atsuki Fukazawa ,  Hideaki Fukuda

IPC: H01L21/02 ,  H01J37/32 ,  H01L21/762 ,  C23C16/455 ,  C23C16/04 ,  C23C16/40

CPC classification number: H01L21/0228 ,  H01J37/32009 ,  H01L21/76224 ,  H01L21/02274 ,  H01L21/02178 ,  H01L21/02299 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/0217 ,  H01L21/02183 ,  H01L21/02219 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/045 ,  C23C16/402 ,  H01J2237/334 ,  H01J2237/3321

Abstract: According to the invention there is provided a method of filling one or more gaps created during manufacturing of a feature on a substrate by providing a deposition method comprising; introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant; introducing a second reactant to the substrate with a second dose. The first reactant is introduced with a sub saturating first dose reaching only a top area of the surface of the one or more gaps and the second reactant is introduced with a saturating second dose reaching a bottom area of the surface of the one or more gaps. A third reactant may be provided to the substrate in the reaction chamber with a third dose, the third reactant reacting with at least one of the first and second reactant.

公开(公告)号：US11610775B2

公开(公告)日：2023-03-21

申请号：US16318094

申请日：2017-07-14

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Steven R. A. Van Aerde ,  Suvi Haukka ,  Atsuki Fukazawa ,  Hideaki Fukuda

IPC: H01L21/02 ,  H01J37/32 ,  C23C16/455 ,  H01L21/762 ,  C23C16/04 ,  C23C16/40

Abstract: According to the invention there is provided a method of filling one or more gaps created during manufacturing of a feature on a substrate by providing a deposition method comprising; introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant; introducing a second reactant to the substrate with a second dose. The first reactant is introduced with a subsaturating first dose reaching only a top area of the surface of the one or more gaps and the second reactant is introduced with a saturating second dose reaching a bottom area of the surface of the one or more gaps. A third reactant may be provided to the substrate in the reaction chamber with a third dose, the third reactant reacting with at least one of the first and second reactant.

公开(公告)号：US20210118667A1

公开(公告)日：2021-04-22

申请号：US17068495

申请日：2020-10-12

Applicant: ASM IP Holding B.V.

Inventor： Atsuki Fukazawa ,  Masaru Zaitsu ,  Pei-Chia Chen

IPC: H01L21/02 ,  H01L21/311 ,  C23C16/34 ,  C23C16/455 ,  C23C16/56

Abstract: A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.

公开(公告)号：US20200318237A1

公开(公告)日：2020-10-08

申请号：US16835283

申请日：2020-03-30

Applicant: ASM IP Holding B.V.

Inventor： Atsuki Fukazawa

IPC: C23C16/455 ,  C23C16/34

Abstract: Methods for forming a boron nitride film by a plasma enhanced atomic layer deposition (PEALD) process are provided. The methods may include: providing a substrate into a reaction chamber; and performing at least one unit deposition cycle of a PEALD process, wherein a unit cycle comprises, contacting the substrate with a vapor phase reactant comprising a boron precursor, wherein the boron precursor comprises less than or equal to two halide atoms per boron atom; and contacting the substrate with a reactive species generated from a gas comprising a nitrogen precursor.

公开(公告)号：US20200251328A1

公开(公告)日：2020-08-06

申请号：US16752514

申请日：2020-01-24

Applicant: ASM IP Holding B.V.

Inventor： Masaru Zaitsu ,  Atsuki Fukazawa

IPC: H01L21/02 ,  H01L21/311

Abstract: A method for forming a dielectric film containing a Si—O bond a trench formed in an upper surface of a substrate, includes: designing a topology of a final dielectric film containing a Si—O bond formed in the trench by preselecting a target portion to be selectively removed relative to a non-target portion of an initial dielectric film resulting in the final dielectric film; conformally depositing the initial dielectric film on the upper surface and in the trench; and relatively increasing an amount of impurities contained in the target portion of the initial dielectric film relative to an amount of impurities contained in the non-target portion of the initial dielectric film to obtain a treated dielectric film, thereby giving the target portion and the non-target portion different chemical resistance properties when subjected to etching.