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公开(公告)号：JP2010140987A
公开(公告)日：2010-06-24
申请号：JP2008314022
申请日：2008-12-10
Applicant: Casio Computer Co Ltd , カシオ計算機株式会社
Inventor： KOMUTSU YASUSUKE , OKADA OSAMU , KUWABARA OSAMU , SHIODA JUNJI , FUJII NOBUMITSU
IPC: H01L23/12
CPC classification number: H01L21/6836 , H01L21/568 , H01L21/78 , H01L23/3114 , H01L23/3135 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/94 , H01L2221/6834 , H01L2224/0401 , H01L2224/16 , H01L2224/18 , H01L2224/94 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/3511 , H01L2224/11 , H01L2224/03
Abstract: PROBLEM TO BE SOLVED: To prevent an entire resin protective film from being warped easily when curing the resin protective film when forming the resin protective film for protecting the bottom and sides of a silicon substrate. SOLUTION: First, a trench 28 is formed in a semiconductor wafer 21, a sealing film 12, and the like in a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into respective silicon substrates 1 by the formation of the trench 28. Then, the resin protective film 11 is formed on a bottom of the respective silicon substrates 1 including the inner part of the trench 28. In this case, the semiconductor wafer 21 is separated into the respective silicon substrates 1. However, a support plate 24 is affixed to upper surfaces of a columnar electrode 10 and the sealing film 12 via an adhesive layer 23. Accordingly, when the resin protective film 11 is formed, it is possible to prevent the entire resin protective film 11 including the separated silicon substrates 1 from being warped easily. COPYRIGHT: (C)2010,JPO&INPIT
Abstract translation: 要解决的问题：为了防止在形成用于保护硅衬底的底部和侧面的树脂保护膜时固化树脂保护膜时容易使整个树脂保护膜翘曲。 解决方案：首先，在切割街道22中的半导体晶片21，密封膜12等中形成沟槽28，并且与切割街22的两侧对应的部分形成沟槽28.在该状态下，半导体 通过形成沟槽28将晶片21分离成各自的硅衬底1.然后，在包括沟槽28的内部的各个硅衬底1的底部上形成树脂保护膜11.在这种情况下，半导体 将晶片21分离成各自的硅基板1.然而，支撑板24通过粘合层23固定在柱状电极10和密封膜12的上表面。因此，当形成树脂保护膜11时 可以防止包含分离的硅基板1的整个树脂保护膜11容易翘曲。 版权所有（C）2010，JPO＆INPIT
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公开(公告)号：JP2010140948A
公开(公告)日：2010-06-24
申请号：JP2008313208
申请日：2008-12-09
Applicant: Casio Computer Co Ltd , カシオ計算機株式会社
Inventor： KOMUTSU YASUSUKE , OKADA OSAMU , KUWABARA OSAMU , SHIODA JUNJI , FUJII NOBUMITSU
IPC: H01L23/12
CPC classification number: H01L21/561 , H01L21/568 , H01L23/3114 , H01L23/525 , H01L24/13 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05124 , H01L2224/05147 , H01L2224/05569 , H01L2224/16 , H01L2924/14 , H01L2924/19041 , H01L2924/00014
Abstract: PROBLEM TO BE SOLVED: To prevent an entire resin protective film from being warped easily, when curing the resin protective film, in forming the resin protective film for protecting the bottom and sides of a silicon substrate. SOLUTION: First, a trench 28 is formed in a semiconductor wafer 21, a sealing film 12, and the like in a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into respective silicon substrates 1 by the formation of the trench 28. Then, the resin protective film 11 is formed on a bottom of the respective silicon substrates 1 including the inner part of the trench 28. In this case, the semiconductor wafer 21 is separated into the respective silicon substrates 1. However, a support plate 25 is affixed to upper surfaces of a columnar electrode 10 and the sealing film 12 via an adhesive layer 23, or the like. Accordingly, when the resin protective film 11 is formed, it is possible to prevent the entire resin protective film 11 including the separated silicon substrates 1 from being warped easily. COPYRIGHT: (C)2010,JPO&INPIT
Abstract translation: 要解决的问题为了防止整个树脂保护膜翘曲变形，在树脂保护膜固化时，形成用于保护硅衬底的底部和侧面的树脂保护膜。 解决方案：首先，在切割街道22中的半导体晶片21，密封膜12等中形成沟槽28，并且与切割街22的两侧对应的部分形成沟槽28.在该状态下，半导体 通过形成沟槽28将晶片21分离成各自的硅衬底1.然后，在包括沟槽28的内部的各个硅衬底1的底部上形成树脂保护膜11.在这种情况下，半导体 晶片21被分离成各自的硅基板1.然而，支撑板25通过粘合剂层23等固定在柱状电极10和密封膜12的上表面上。 因此，当形成树脂保护膜11时，可以防止包含分离的硅衬底1的整个树脂保护膜11变得容易翘曲。 版权所有（C）2010，JPO＆INPIT
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公开(公告)号：JP2000223519A
公开(公告)日：2000-08-11
申请号：JP2597199
申请日：1999-02-03
Applicant: CASIO COMPUTER CO LTD
Inventor： MIHARA ICHIRO , KUWABARA OSAMU
Abstract: PROBLEM TO BE SOLVED: To enable columnar electrodes of a semiconductor device to absorb stresses. SOLUTION: A resin seal film 17 is formed, using a printing mask 14 and a squeegee 15. The mask 14 has a thickness adequately less than the height of columnar electrodes 12, and hence the top faces of the electrodes 12 are covered with the resin seal film 17 but the thickness of the seal film 17 between the columnar electrodes 12 is adequately less than the height of the columnar electrodes 12. Since the thickness of the seal film 17 between the columnar electrodes 12 is adequately less than the height of the columnar electrodes 12, the columnar electrodes 12 can absorb stresses, due to the thermal expansion coefficient difference between the Si substrate 11 and a circuit board in a temp. cycle test after mounting on the circuit board.
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公开(公告)号：JP2000223518A
公开(公告)日：2000-08-11
申请号：JP2593499
申请日：1999-02-03
Applicant: CASIO COMPUTER CO LTD
Inventor： KUWABARA OSAMU , WAKABAYASHI TAKESHI
Abstract: PROBLEM TO BE SOLVED: To enable columnar electrodes of a semiconductor device to absorb stresses. SOLUTION: A laminate of a protective film 14, an upper layer seal film 15 and a lower layer seal film 16 laminated on the lower surface of a base film 13, is laid on the top faces of columnar electrodes 12 on a Si substrate 11 and pressed and heated to embed the columnar electrodes 12 piercing the lower and upper layer seal films 16, 15 in the protective film 14, and the base film 13 and the protective film 14 are peeled off, to result in the columnar electrodes 12 being projected at approximately the upper halves up from the upper layer seal film 15.
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公开(公告)号：JPH01137581A
公开(公告)日：1989-05-30
申请号：JP9681088
申请日：1988-04-21
Applicant: CASIO COMPUTER CO LTD
Inventor： SUZUKI SATOSHI , KUWABARA OSAMU , MUTO JIRO , SHINOZAKI HIDEKAZU
Abstract: PURPOSE:To prevent the short circuit with the adjacent connection portion and allow reliable and firm connection by forming a bank section of solder plating on the side wall of a metal lead foil. CONSTITUTION:A metal lead foil 7 applied with solder plating 7C is thermally press-stuck to a connection terminal section 2a formed wider than the metal lead foil 7, and the bank section 10 of the solder plating 7C is formed on the side wall of the metal lead foil 7. When the width of the connection terminal section 2a is formed wider than the width of the metal lead foil 7 applied with solder plating 7C, the positioning of the metal lead foil 7 at the time of connection to the connection terminal section 2a can be facilitated. When the metal lead foil 7 is thermally press-stuck to the connection terminal section 2a and the bank section 10 of solder plating is formed on the side wall of the metal lead foil 7, reliable and firm connection can be performed, and the short circuit with the adjacent connection portion due to the outflow of solder plating in the side direction can be prevented.
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Patent Agency Ranking
公开(公告)号：JP2010182837A
公开(公告)日：2010-08-19
申请号：JP2009024408
申请日：2009-02-05
Applicant: Casio Computer Co Ltd , カシオ計算機株式会社
Inventor： SHIODA JUNJI , KOSUGI TOMOYUKI , KUWABARA OSAMU , OKADA OSAMU
IPC: H01L21/02 , H01L21/677
Abstract: PROBLEM TO BE SOLVED: To suck and transport a semiconductor wafer and a protection sheet which are stacked while surely distinguishing between the semiconductor wafer and the protection sheet. SOLUTION: The protection sheet 22 is sucked to a lower surface of a distal portion of a flexible arm 26 and lifted. In this case, the weight of the protection sheet 2 is 1 to 2 g, being relatively light. Consequently, the bending amount of the flexible arm 26 lifting the protection sheet 22 is relatively small. When the semiconductor wafer 23 is sucked to the lower surface of the distal portion of the flexible arm 26 and lifted, the weight of the semiconductor wafer 23 is tens of times as heavy as the weight of the protection sheet 2, being much heavier, so that the bending amount of the flexible arm 26 is relatively large. The bending amount of the flexible arm 26 is detected by a strain gauge 27. Then it is discriminated, from the difference in weight between the semiconductor wafer 23 and protection sheet 2, which of the protection sheet 22 and semiconductor wafer 23 is being lifted by the flexible arm 26. After that, the protection sheet 22 or semiconductor wafer is sucked by a suction member and transported to another place. COPYRIGHT: (C)2010,JPO&INPIT
Abstract translation: 要解决的问题：在确定地区分半导体晶片和保护片的同时，吸收并输送层叠的半导体晶片和保护片。 解决方案：保护片22被吸入柔性臂26的远端部分的下表面并提升。 在这种情况下，保护片2的重量相对较轻，为1〜2g。 因此，提升保护片22的柔性臂26的弯曲量相对较小。 当将半导体晶片23吸引到柔性臂26的远端部分的下表面并提升时，半导体晶片23的重量比保护片2的重量重几十倍，因此更重 柔性臂26的弯曲量相对较大。 柔性臂26的弯曲量由应变计27检测。然后，根据半导体晶片23和保护片2之间的重量差，鉴别出保护片22和半导体晶片23中的哪一个被提升 柔性臂26.此后，保护片22或半导体晶片由抽吸构件吸引并输送到另一个位置。 版权所有（C）2010，JPO＆INPIT
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公开(公告)号：JP2001085561A
公开(公告)日：2001-03-30
申请号：JP26005099
申请日：1999-09-14
Applicant: CASIO COMPUTER CO LTD
Inventor： KUWABARA OSAMU
Abstract: PROBLEM TO BE SOLVED: To absorb stresses by columnar electrodes of a semiconductor device. SOLUTION: A sealing film 16 is formed by using a print mask 14 and a squeegee 15. In this case, the tip part of the squeegee 15 has a flank almost in a V-shape and is pressed in between columnar electrodes 12 for printing. Then the sealing film 16 is recessed between the columnar electrodes 12. Consequently, the columnar electrodes 12 tends to shake and in a temperature cycle test after a device is mounted on a circuit board, stresses due to the difference in coefficient of thermal expansion between a silicon substrate 11 and the circuit board can be absorbed by the columnar electrodes 12.
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公开(公告)号：JPH08107272A
公开(公告)日：1996-04-23
申请号：JP26089594
申请日：1994-10-03
Applicant: CASIO COMPUTER CO LTD
Inventor： KUWABARA OSAMU
Abstract: PURPOSE: To provide a junction method capable of performing efficient solder junction step using no flux at all in order to junction an electronic part with a wiring substrate. CONSTITUTION: The electrode 17 of a film carrier tape 16 is mounted on the wiring 13 of a wiring substrate 11 to be irradiated with laser beams while supporting the electrode 17 by a protrusion of a junction device. At this time, the junction part is fed with hydrogen gas mixed with argon to reduce the oxide film formed on the junction part. Through these procedures, solder junction step can be performed using no flux at all, thereby eliminating the cleaning step of a transparent member 22.
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公开(公告)号：JPH05206221A
公开(公告)日：1993-08-13
申请号：JP3581392
申请日：1992-01-28
Applicant: CASIO COMPUTER CO LTD
Inventor： YAMAMOTO MICHIHIKO , KUWABARA OSAMU
IPC: H01L21/603 , H01L21/321 , H01L21/60
Abstract: PURPOSE:To prevent generation of short-circuit between adjacent solder bumps, when the pitch of IC chip electrodes is fine. CONSTITUTION:An IC chip 21 is provided with a solder layer 29 of low melting point under an electrode 23. A wiring board 31 is provided with a solder bump 36 of high melting point on a connection pad 33. Said bump 36 is composed of a barrel type solder part 36a and a circular cone type solder part 36b. When themocompression bonding is performed at a heating temperature wherein the solder layer 29 is fused but the solder bump 36 is not fused, the barrel type solder part 36a is not crushed in the lateral direction but the cone type solder part 36b is suitably crushed via the solder layer 29 by a metal bump 28. Thereby the solder bump 36 is not stretched in the lateral direction as a whole, so that short-circuit between the adjacent solder bumps 36 can be prevented when the pitch of the electrodes 23 is as fine as 100-150mum.
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公开(公告)号：JPH05144816A
公开(公告)日：1993-06-11
申请号：JP32683591
申请日：1991-11-15
Applicant: CASIO COMPUTER CO LTD
Inventor： KUWABARA OSAMU
IPC: H01L21/60 , H01L21/321
Abstract: PURPOSE:To provide a face-down bonding method with which the flux washing of the connection part between a wiring substrate and a semiconductor chip can be conducted easily by increasing the gap between a wiring substrate and a semiconductor chip even when the height of the solder bump on the semiconductor chip side is low and also subsequent sealing of gap can be conducted easily. CONSTITUTION:A wiring substrate 10 is formed by providing the connection electrode 15 of a conductor 12, which is provided on a substrate 11 through bonding agent 30, in such a manner that the substrate 10 is protruding higher than the coating layer 14 of the solder resist formed on the above-mentioned conductor 12. A bump 22, which is formed protruding to the lower part of a semiconductor chip 20, is heat-welded to the connection electrode 15.
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