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53 records (took 0.024 seconds)

    21.
    发明专利
    未知

    公开(公告)号：DE69514189T2

    公开(公告)日：2000-06-15

    申请号：DE69514189

    申请日：1995-09-28

    Applicant: CSELT CENTRO STUDI LAB TELECOM

    Inventor： BOSTICA BRUNO ,  DELPIANO FRANCO ,  PESANDO LUCA

    IPC: G02B6/42 ,  H01S5/02 ,  H01S5/022 ,  H01S5/024 ,  H01S3/025

    Abstract: Transmitter module for optical interconnections, comprising a metal container housing (A) an optical emitting device (E), an integrated circuit (B) containing the driving circuit of the emitting device and an optical fibre (I) extending outside the container, the emitting device being mounted on a metallic ground area (D) realized on the integrated circuit. The cathode is electrically connected to the ground area and the anode is connected to a second metal area, connected with the output of the driving circuit. The module uses a type of assembly which minimises problems due to the length of the connecting wires, to parasitic effects and to the effects of signal reflections due to impedance mismatching. It also requires reduced power for its operation and it is provided with a structure facilitating dissipation, in that said first, ground area (D) extends over the surface of the integrated circuit by means of metallization strips (C), acting as thermal dissipation means for said optical emitting device (E).

    22.
    发明专利
    未知

    公开(公告)号：DE69321996D1

    公开(公告)日：1998-12-17

    申请号：DE69321996

    申请日：1993-06-14

    Applicant: CSELT CENTRO STUDI LAB TELECOM

    Inventor： BOSTICA BRUNO ,  CINATO PAOLA ,  DE BOSIO ALFREDO

    IPC: H04Q3/52 ,  H04L12/56 ,  H04Q11/00 ,  H04Q11/04

    Abstract: The optical switch for fast cell-switching networks comprises an optical interconnection network (CM) and an electrical control network (CT). In order to fully exploit optical component capabilities and to overcome the constraints imposed by operating speed limits of electronic components, each input (IN1...INk) of the interconnection network (CM) is associated with means (PAC1...PACk) forming aggregates of cells which are to follow a same path through the interconnection network and time-compressing the aggregates, and each output (OU1...OUk) is associated with means (PAD1...PADk) for the time expansion of the aggregates and separation of the aggregate cells.

    23.
    发明专利
    未知

    公开(公告)号：DE675664T1

    公开(公告)日：1998-11-19

    申请号：DE95104660

    申请日：1995-03-29

    Applicant: CSELT CENTRO STUDI LAB TELECOM

    Inventor： BOSTICA BRUNO ,  CINATO PAOLA ,  ZUCCHELLI LIBERO

    IPC: H04B10/02 ,  H04L7/00 ,  H04L7/04 ,  H04L12/56 ,  H04Q3/00 ,  H04Q11/00

    Abstract: The device for the phase realignment of ATM cells in an optical ATM switching node is associated with each input line (Fe) of node and includes means (RIC) for recognizing the beginning of a cell, means (VE) for evaluating the time shift between of a cell and a reference instant and for generating an error signal (ER) depending on the amount of time difference, and means (LR) for compensating the time difference, driven by the error signal (ER). The time difference compensating means (LR) includes a logarithmic optical delay line that is connected upstream of the means (RIC, VE) for recognizing the beginning of a cell and for evaluating the amount of the time difference.

    25.
    发明专利
    未知

    公开(公告)号：ITTO940757A1

    公开(公告)日：1996-03-29

    申请号：ITTO940757

    申请日：1994-09-29

    Applicant: CSELT CENTRO STUDI LAB TELECOM

    Inventor： BOSTICA BRUNO ,  DELPIANO FRANCO ,  PESANDO LUCA

    IPC: G02B6/42 ,  H01S5/00 ,  H04B10/12 ,  H04B10/135 ,  H04B10/14 ,  H04B10/2581

    Abstract: Transmitter module for optical interconnections, comprising a metal container housing an optical emitting device, an integrated circuit containing the driving circuit of the emitting device and an optical fibre extending outside the container, the emitting device being mounted on a metallic ground area realized on the integrated circuit. The cathode is electrically connected to the ground area and the anode is connected to a second metal area, connected with the output of the driving circuit. The module uses a type of assembly which minimises problems due to the length of the connecting wires, to parasitic effects and to the effects of signal reflections due to impedance mismatching. It also requires reduced power for its operation and it is provided with a structure facilitating dissipation.

    Device for the Phase Realignment of ATM Cells in Optical ATM Nodes
    26.
    发明专利
    Device for the Phase Realignment of ATM Cells in Optical ATM Nodes 未知

    公开(公告)号：CA2145817A1

    公开(公告)日：1995-10-01

    申请号：CA2145817

    申请日：1995-03-29

    Applicant: CSELT CENTRO STUDI LAB TELECOM

    Inventor： BOSTICA BRUNO ,  CINATO PAOLA ,  ZUCCHELLI LIBERO

    IPC: H04B10/02 ,  H04L7/00 ,  H04L7/04 ,  H04L12/56 ,  H04Q3/00 ,  H04B10/12

    Abstract: The device for the phase realignment of ATM cells in an optical ATM switching node is associated with each input line (Fe) of node and includes means (RIC) for recognizing the beginning of a cell, means (VE) for evaluating the time shift between of a cell and a reference instant and for generating an error signal (ER) depending on the amount of time difference, and means (LR) for compensating the time difference, driven by the error signal (ER). The time difference compensating means (LR) includes a logarithmic optical delay line that is connected upstream of the means (RIC, VE) for recognizing the beginning of a cell and for evaluating the amount of the time difference.

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