公开(公告)号：AU2003243743A1

公开(公告)日：2005-02-14

申请号：AU2003243743

申请日：2003-06-24

Applicant: IBM

Inventor： GAIDIS MICHAEL C

IPC: H01L21/321 ,  H01L21/8246 ,  H01L23/544 ,  H01L27/22 ,  H01L21/46 ,  H01L21/301 ,  H01L21/78 ,  H01L21/762

Abstract: A method for forming an alignment mark structure for a semiconductor device includes forming an alignment recess at a selected level of the semiconductor device substrate. A first metal layer is formed over the selected substrate level and within the alignment recess, wherein the alignment recess is formed at a depth such that the first metal layer only partially fills the alignment recess. A second metal layer is formed over the first metal layer such that the alignment recess is completely filled. The second metal layer and the first metal layer are then planarized down to the selected substrate level, thereby creating a sacrificial plug of the second layer material within the alignment recess. The sacrificial plug is removed in a manner so as not to substantially roughen the planarized surface at the selected substrate level.

公开(公告)号：DE102004030860A1

公开(公告)日：2005-02-03

申请号：DE102004030860

申请日：2004-06-25

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： BROWN STEPHEN L ,  COSTRINI GREG ,  GAIDIS MICHAEL C ,  FINDEIS FRANK ,  GLASHAUSER WALTER ,  NUETZEL JOACHIM ,  PARK CHANRO ,  O'SULLIVAN EUGENE

IPC: H01L21/4763 ,  H01L21/60 ,  H01L21/768 ,  H01L23/532 ,  H01L27/22

Abstract: Encapsulating areas of metallization in a liner material, such as Tantalum, Tantalum Nitride, Silicon Carbide allows aggressive or harsh processing steps to be used. These aggresive processing steps offer the possibility of fabricating new device architectures. In addition, by encapsulating the areas of metallization, metal ion migration and electromigration can be prevented. Further, the encapsulated areas of metallization can serve as a self-aligning etch mask. Thus, vias etched between adjacent areas of metallization allow the area of the substrate allocated to the via to be significantly reduced without increasing the possibility of electrical shorts to the adjacent areas of metallization.