公开(公告)号：DE69636808D1

公开(公告)日：2007-02-15

申请号：DE69636808

申请日：1996-11-08

Applicant: IBM

Inventor： GAMBINO JEFFREY PETER ,  JASO MARK ANTHONY ,  NESBIT LARRY ALAN

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/285 ,  H01L21/304 ,  H01L21/321

Abstract: Forming inter level studs of at least two different materials, in an insulating layer on a semiconductor wafer comprises: (a) forming a layer of insulating material on a semiconductor wafer; (b) planarising the insulating layer; (c) forming a first group of vias through the insulating layer; (d) forming a layer of first conducting material on the insulating layer; (e) forming a second group of vias through the first conducting material layer and insulating layer; (f) forming a layer of a second conductive material filling the first and second group of vias; (g) removing the second conductive layer to expose the first conductive material layer, such that the second conductive material remains only in the first and second via groups; and (h) removing the exposed first conductive material layer. Also claimed is the method as above in which steps (b),(h) and (i) are achieved by chemically-mechanically polishing, (c) and (e) are etched, and dopant is implanted into the wafer through the second group of vias and the wafer is annealed after (e).