公开(公告)号：MX388395B

公开(公告)日：2025-03-19

申请号：MX2021005002

申请日：2021-04-29

Applicant: IBM

Inventor： PURANIK ADITYA NITIN ,  GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  ZOELLIN CHRISTIAN GERHARD ,  SCHMIDT DONALD WILLIAM ,  BRADBURY JONATHAN ,  FARRELL MARK ,  RECKTENWALD MARTIN ,  SLEGEL TIMOTHY

IPC: G06F9/30 ,  G06F9/38

Abstract: Guardado y restauración de estado de máquina entre múltiples ejecuciones de una instrucción. Se hace una determinación de que el procesamiento de una operación de una instrucción que se ejecuta en un procesador de ha interrumpido antes de la finalización. Con base en la determinación de que el procesamiento de la operación se ha interrumpido, se extraen metadatos actuales del procesador. Los metadatos se almacenan en una ubicación asociada con la instrucción y se usan para re-ejecutar la instrucción para reasumir procesamiento directo de la instrucción desde donde se interrumpió.

公开(公告)号：ZA201905199B

公开(公告)日：2021-04-28

申请号：ZA201905199

申请日：2019-08-06

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  SCHMIDT DONALD WILLIAM ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  ROSA DANIEL

Abstract: A facility is provided for collecting time-slice-instrumentation information during processing unit execution. The facility counts, at least in part, occurrence of a specified processing unit event during a time-slice of processing unit execution. The counted events occurring during a first interval of execution and a second interval of execution of the time-slice are retained. The first interval of execution is earlier in the time-slice than the second interval of execution, and the counted events facilitate adjusting performance of the processing unit. In an embodiment, the time-slice is a contiguous period of time of processing unit execution, and the specified processing unit event includes a cache event. The processing unit may interleave processing of multiple different units of work across multiple contiguous time-slices, and during a single time-slice, a single unit of work of the multiple different units of work is processed by the processing unit.

公开(公告)号：AU2019377216A1

公开(公告)日：2021-04-22

申请号：AU2019377216

申请日：2019-11-05

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

IPC: G06F9/30

Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.

公开(公告)号：AU2018208419B2

公开(公告)日：2020-10-01

申请号：AU2018208419

申请日：2018-01-03

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F12/0815 ,  G06F9/52 ,  G06F12/084

Abstract: A computing environment facility is provided to extend a hold of a cache line in private (or local) cache exclusively after processing a storage operand request. The facility includes determining whether a storage operand request to a storage location shared by multiple processing units of the computing environment is designated hold. In addition, a determination is made whether a state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively. Based on determining that the storage operand request is designated hold, and that the state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively, continuing to hold the corresponding cache line in the private cache exclusively after completing processing of the storage operand request. The continuing to hold may include initiating a counter to facilitate the continuing hold for a desired, set interval.

公开(公告)号：AU2017392846B2

公开(公告)日：2020-09-17

申请号：AU2017392846

申请日：2017-12-15

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  SCHMIDT DONALD WILLIAM ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  ROSA DANIEL

IPC: G06F9/48 ,  G06F9/50

Abstract: A facility is provided for collecting time-slice-instrumentation information during processing unit execution. The facility counts, at least in part, occurrence of a specified processing unit event during a time-slice of processing unit execution. The counted events occurring during a first interval of execution and a second interval of execution of the time-slice are retained. The first interval of execution is earlier in the time-slice than the second interval of execution, and the counted events facilitate adjusting performance of the processing unit. In an embodiment, the time-slice is a contiguous period of time of processing unit execution, and the specified processing unit event includes a cache event. The processing unit may interleave processing of multiple different units of work across multiple contiguous time-slices, and during a single time-slice, a single unit of work of the multiple different units of work is processed by the processing unit.

公开(公告)号：CA3127864A1

公开(公告)日：2020-08-06

申请号：CA3127864

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  SOFIA ANTHONY THOMAS ,  KLEIN MATTHIAS ,  WEISHAUPT SIMON ,  FARRELL MARK ,  SLEGEL TIMOTHY ,  MISHRA ASHUTOSH ,  JACOBI CHRISTIAN

IPC: G06F9/30

Abstract: An instruction to perform a function of a plurality of functions is obtained. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes performing the function specified by the instruction. The performing includes, based on the function being a compression function or a decompression function, transforming state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data accessing. During performing the function, history relating to the function is accessed. The history is to be used in transforming the state of input data between the uncompressed form and the compressed form.

公开(公告)号：CA3118174A1

公开(公告)日：2020-05-14

申请号：CA3118174

申请日：2019-11-05

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

IPC: G06F9/30 ,  G06F9/38

Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.

公开(公告)号：AU2018208453A1

公开(公告)日：2019-06-13

申请号：AU2018208453

申请日：2018-01-09

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F9/30

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：AU2018208419A1

公开(公告)日：2019-06-13

申请号：AU2018208419

申请日：2018-01-03

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F12/0815 ,  G06F9/52 ,  G06F12/084

Abstract: A computing environment facility is provided to extend a hold of a cache line in private (or local) cache exclusively after processing a storage operand request. The facility includes determining whether a storage operand request to a storage location shared by multiple processing units of the computing environment is designated hold. In addition, a determination is made whether a state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively. Based on determining that the storage operand request is designated hold, and that the state of the corresponding cache line in private cache used for processing the storage operand request is owned exclusively, continuing to hold the corresponding cache line in the private cache exclusively after completing processing of the storage operand request. The continuing to hold may include initiating a counter to facilitate the continuing hold for a desired, set interval.

公开(公告)号：AU2017392846A1

公开(公告)日：2019-06-06

申请号：AU2017392846

申请日：2017-12-15

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  SCHMIDT DONALD WILLIAM ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  ROSA DANIEL

IPC: G06F9/48 ,  G06F9/50

Abstract: A facility is provided for collecting time-slice-instrumentation information during processing unit execution. The facility counts, at least in part, occurrence of a specified processing unit event during a time-slice of processing unit execution. The counted events occurring during a first interval of execution and a second interval of execution of the time-slice are retained. The first interval of execution is earlier in the time-slice than the second interval of execution, and the counted events facilitate adjusting performance of the processing unit. In an embodiment, the time-slice is a contiguous period of time of processing unit execution, and the specified processing unit event includes a cache event. The processing unit may interleave processing of multiple different units of work across multiple contiguous time-slices, and during a single time-slice, a single unit of work of the multiple different units of work is processed by the processing unit.