公开(公告)号：JP2003043980A

公开(公告)日：2003-02-14

申请号：JP2001212765

申请日：2001-07-12

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： KODATE MANABU

IPC: G01R31/02 ,  G01R31/00 ,  G02F1/13 ,  G02F1/133 ,  G02F1/1345 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  G09G3/00 ,  G09G3/20 ,  G09G3/36

Abstract: PROBLEM TO BE SOLVED: To provide a new inspection circuit in which an array inspecting circuit and a cell inspecting circuit are made into an integrated circuit and the number of probes normally required for inspection is reduced. SOLUTION: A first inspection circuit 4 is used to supply inspecting signals to a plurality of data signal lines 12a to 12f which constitute an active/matrix display device. The circuit 4 is provided with a first circuit section 4a which selectively supplies first common inspecting signals to any of the data signal lines 12a to 12f having a prescribed number and a second circuit section 4b which supplies individual second inspection signals to the lines 12a to 12f.

Abstract translation: 要解决的问题：提供将阵列检查电路和电池检查电路制成集成电路的新的检查电路，并且通常需要检查的探针的数量减少。 解决方案：第一检查电路4用于向构成有源/矩阵显示装置的多个数据信号线12a至12f提供检查信号。 电路4设置有第一电路部分4a，其选择性地向具有规定数量的数据信号线12a至12f提供第一公共检查信号;以及第二电路部分4b，其向线路12a至12f提供各个第二检查信号 。

公开(公告)号：JP2001265248A

公开(公告)日：2001-09-28

申请号：JP2000070203

申请日：2000-03-14

Applicant: IBM

Inventor： KODATE MANABU ,  IKEDA MASATO

IPC: G02F1/13 ,  G02F1/133 ,  G02F1/136 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  G09G3/36

Abstract: PROBLEM TO BE SOLVED: To provide a liquid crystal cell and an inspection method therefor for efficiently inspecting picture quality of the liquid crystal cell before a driver IC is connected therewith. SOLUTION: The liquid crystal cell 11 has circuits 4, 5 for inspection. The circuits for inspection comprise each scanning signal wiring 11 or TFTs 22 for inspection connected with each signal wiring 12, inspection terminals 31-35 to be connected with the scanning signal wiring 11, and inspection terminals 41-45 to be connected with the signal wiring 12. Each inspection terminal is connected with multiple inspection TFTs 22. A display area is split into multiple blocks, and each block is connected with a set of scanning side inspection terminals and a set of signal side inspection terminals. Scanning signal wiring and signal wiring for a specific area are allocated to each block. Since multiple signal lines are properly put together with the TFTs and terminals for inspection, necessary image quality inspection can be carried out without using a multi-pin probe.

公开(公告)号：DE69635647D1

公开(公告)日：2006-02-02

申请号：DE69635647

申请日：1996-10-17

Applicant: IBM

Inventor： KOIKE TETSUSHI ,  KODATE MANABU ,  IKEZAKI MITSURU

IPC: G02F1/13 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368

Abstract: The present invention is related to a liquid crystal display in which the antistatic measures in the manufacturing process is taken, and a method for manufacturing the same, and intended for providing a liquid crystal display in which the occurrence of static failure before the formation of the short ring is prevented, and a method for manufacturing the same. On a glass substrate (2), gate lines (46) are formed. The gate lines (46) are disconnected, and in the disconnected portion, discharge projections (52) and (54) are formed on both sides of a discharge gap (50). The discharge projections (52) and (54) are positioned substantially at the centre of the edges of the disconnected portion of the gate lines (46). On the gate lines (46) and in the discharge gap 50, a gate insulation film 56 is formed. Two through holes 58 are made in the gate insulation film (56) in the vicinity of the discharge projections (52) and (54) of each gate line (46). A metal wiring layer (48) is formed on the gate insulation film (56) so as to fill in the through holes (58).

公开(公告)号：DE69530333T2

公开(公告)日：2004-02-19

申请号：DE69530333

申请日：1995-01-24

Applicant: IBM

Inventor： KODATE MANABU ,  KIMURA SHINICHI ,  YAMANAKA HIDEMINE ,  IKEZAKI MITSURU

IPC: G02F1/1345 ,  G02F1/136 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/78 ,  H01L29/786 ,  G02F1/1335

Abstract: The present invention relates to improvements in the frame area of the liquid display panel of a liquid crystal display device, and provides a liquid crystal display device which is enhanced in its blocking ability and the ability of the blocking area to prevent electrostatic failure. A blocking layer 12 is formed in a frame area 1 on TFT array substrate 3. The edge portions of the blocking layer 12 have overlapping areas 14 overlapping the edge portions of each of data lines 10, which are metal layers, with a predetermined overlapping margin d as viewed from a direction perpendicular to the surface of the TFT array substrate 3. An insulation layer 16 is formed on the blocking layer 12 and the TFT array substrate 3. On the insulation layer 16 a semiconductor layer 18 is formed. A plurality of data lines 10 are then disposed on the semiconductor layer 18. The blocking structure thus formed improves the quality of the image display area since it reduces the quantity of light being transmitted from the frame area. Further, the transistor structure formed by the various gate lines, data lines, and blocking lines contributes to the prevention of electrostatic failure.

公开(公告)号：DE69530333D1

公开(公告)日：2003-05-22

申请号：DE69530333

申请日：1995-01-24

Applicant: IBM

Inventor： KODATE MANABU ,  KIMURA SHINICHI ,  YAMANAKA HIDEMINE ,  IKEZAKI MITSURU

IPC: G02F1/1345 ,  G02F1/136 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/78 ,  H01L29/786 ,  G02F1/1335

Abstract: The present invention relates to improvements in the frame area of the liquid display panel of a liquid crystal display device, and provides a liquid crystal display device which is enhanced in its blocking ability and the ability of the blocking area to prevent electrostatic failure. A blocking layer 12 is formed in a frame area 1 on TFT array substrate 3. The edge portions of the blocking layer 12 have overlapping areas 14 overlapping the edge portions of each of data lines 10, which are metal layers, with a predetermined overlapping margin d as viewed from a direction perpendicular to the surface of the TFT array substrate 3. An insulation layer 16 is formed on the blocking layer 12 and the TFT array substrate 3. On the insulation layer 16 a semiconductor layer 18 is formed. A plurality of data lines 10 are then disposed on the semiconductor layer 18. The blocking structure thus formed improves the quality of the image display area since it reduces the quantity of light being transmitted from the frame area. Further, the transistor structure formed by the various gate lines, data lines, and blocking lines contributes to the prevention of electrostatic failure.