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21.
公开(公告)号:AU2012278245B2
公开(公告)日:2015-08-13
申请号:AU2012278245
申请日:2012-05-10
Applicant: IBM
Inventor: MACCHIANO ANGELO , TARCZA RICHARD , WINTER ALEXANDRA , SITTMANN III GUSTAV , STEVENS JERRY
IPC: G06F9/54
Abstract: Automatically converting a synchronous data transfer to an asynchronous data transfer. Data to be transferred from a sender to a receiver is initiated using a synchronous data transfer protocol. Responsive to a determination that the data is to be sent asynchronously, the data transfer is automatically converted from the synchronous data transfer to the asynchronous data transfer.
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公开(公告)号:GB2505370B
公开(公告)日:2014-08-20
申请号:GB201321247
申请日:2012-06-06
Applicant: IBM
Inventor: STEVENS JERRY , KASSIMIS CONSTANTINOS , BAILEY KIMBERLY TEKAVEE , MCAFEE GARY OWEN , WINTER ALEXANDRA , MACCHIANO ANGELO , TARCZA RICHARD , DRIEVER PATRICIA
IPC: G06F9/455
Abstract: A Hardware Management Console (HMC) configures virtual networks. The HMC extends Internal Queued Direct I/O to an intra-ensemble data network (IEDN) within a cluster of virtual servers to define a single channel path identifier, and to define a channel parameter. The HMC defines at least one virtual network. The HMC defines a bridge port within each CPC that supports at least one of the virtual servers. The HMC defines a network interface for each virtual server within each cluster. The HMC grants access to a corresponding virtual network for each virtual server.
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公开(公告)号:GB2505370A
公开(公告)日:2014-02-26
申请号:GB201321247
申请日:2012-06-06
Applicant: IBM
Inventor: STEVENS JERRY , KASSIMIS CONSTANTINOS , BAILEY KIMBERLY TEKAVEE , MCAFEE GARY OWEN , WINTER ALEXANDRA , MACCHIANO ANGELO , TARCZA RICHARD , DRIEVER PATRICIA
IPC: G06F9/455
Abstract: A Hardware Management Console (HMC) configures virtual networks. The HMC extends Internal Queued Direct I/O to an intra-ensemble data network (IEDN) within a cluster of virtual servers to define a single channel path identifier, and to define a channel parameter. The HMC defines at least one virtual network. The HMC defines a bridge port within each CPC that supports at least one of the virtual servers. The HMC defines a network interface for each virtual server within each cluster. The HMC grants access to a corresponding virtual network for each virtual server.
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24.
公开(公告)号:SG194208A1
公开(公告)日:2013-12-30
申请号:SG2013077383
申请日:2012-05-10
Applicant: IBM
Inventor: MACCHIANO ANGELO , TARCZA RICHARD , WINTER ALEXANDRA , SITTMANN III GUSTAV , STEVENS JERRY
Abstract: Automatically converting a synchronous data transfer to an asynchronous data transfer. Data to be transferred from a sender to a receiver is initiated using a synchronous data transfer protocol. Responsive to a determination that the data is to be sent asynchronously, the data transfer is automatically converted from the synchronous data transfer to the asynchronous data transfer.
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公开(公告)号:MX2013011406A
公开(公告)日:2013-12-09
申请号:MX2013011406
申请日:2012-05-10
Applicant: IBM
Inventor: SITTMANN III GUSTAV , MACCHIANO ANGELO , TARCZA RICHARD , WINTER ALEXANDRA , STEVENS JERRY
IPC: G06F9/54
Abstract: Se describe un método para convertir una transferencia de datos síncrona a una transferencia de datos asíncrona. Los datos a ser transferidos de un remitente a un receptor son iniciados usando un protocolo de transferencia de datos síncrona. En respuesta a la determinación de que los datos van a ser enviados asincronamente, la transferencia de datos es convertida automáticamente de transferencia de datos síncrona a transferencia de datos asincrona.
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公开(公告)号:AU2010355865A1
公开(公告)日:2012-12-20
申请号:AU2010355865
申请日:2010-11-08
Applicant: IBM
Inventor: SITTMANN III GUSTAV , CRADDOCK DAVID , GREGG THOMAS , SCHMIDT DONALD WILLIAM , BELMAR BRENTON FRANCOIS , FARRELL MARK , OSISEK DAMIAN LEO , TARCZA RICHARD , EASTON JANET
IPC: G06F9/48
Abstract: The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions.
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