公开(公告)号：DE10127194B4

公开(公告)日：2008-08-21

申请号：DE10127194

申请日：2001-06-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTLIEB HEIMO ,  MAY CHRISTIAN ,  DIRSCHERL GERD ,  SEDLAK HOLGER

IPC: G11C29/24 ,  G11C8/20

公开(公告)号：AT366443T

公开(公告)日：2007-07-15

申请号：AT04104676

申请日：2000-05-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN

IPC: G06F1/00 ,  G06F9/38 ,  G06F21/55 ,  G07F7/10

Abstract: Secure data processing unit has a data and program memory (1), a command controller (2) and a control unit (3) for controlling a multiplicity of the function steps of the command controller. An additional empty function generator (4) is provided that generates random empty functions and thus also causes empty input-output processes. An independent claim is made for a method for securing a data processing unit against electronic eavesdropping in which additional empty transmit and receive processes are initiated.

公开(公告)号：AT357017T

公开(公告)日：2007-04-15

申请号：AT02701190

申请日：2002-01-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  SEDLAK HOLGER

IPC: G06F9/34 ,  G06F9/30 ,  G06F9/305 ,  G06F9/42 ,  G06K19/07

Abstract: A microprocessor circuit includes a control unit, a memory for free programming with at least one program having functions, a stack for buffer-storing data, a register bank having at least one register, and an auxiliary register that stores a number of bits, each of the bits being assigned to one of the registers of the register bank and indicating whether or not a respective register of the register bank contains information items.

公开(公告)号：DE10303452A1

公开(公告)日：2004-08-19

申请号：DE10303452

申请日：2003-01-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  NOLLES JUERGEN ,  SEDLAK HOLGER

IPC: G06F11/36 ,  G06F9/44 ,  G06F13/14

公开(公告)号：CA2420791A1

公开(公告)日：2003-02-05

申请号：CA2420791

申请日：2001-12-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POCKRANDT WOLFGANG ,  SEDLAK HOLGER ,  MAY CHRISTIAN ,  BRUECKLMAYR FRANZ-JOSEF

IPC: G06F12/16 ,  G11C16/10

Abstract: The invention relates to a method for storing a volume of data in a target memory area according to which the volume of data is firstly saved in a non- volatile buffer memory area (10). It is then verified if the data has been successfully saved in the non-volatile buffer memory area (10). If the verification step yields a positive result, the target memory area (12), in which the predetermined volume of data should be stored, is erased. After erasing the target memory area (12), the data is transmitted from the non- volatile buffer memory area (10) into the target memory area (12). In order to terminate the memory cycle, the non-volatile buffer memory area (10) is eras ed whereby making it available for a new memory process. This results in accomplishing a reliable and uncomplicated transmission of information from a source memory (20) into the target memory (12).

公开(公告)号：DE10127181A1

公开(公告)日：2002-12-19

申请号：DE10127181

申请日：2001-06-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GAMMEL BERNDT ,  SEDLAK HOLGER ,  MAY CHRISTIAN ,  ZAIG DIETMAR

IPC: G06F12/14 ,  G07F7/10

Abstract: Method for producing a security module with virtual memory addressing in which the logical address is related to a physical address in a unique manner using imaging rules, whereby the method has the following steps: provision of a first security module with a first imaging rules; provision of a second security module with second imaging rules whereby the two sets of rules differ. Independent claims are also made for a security module and a device for production of security modules.

公开(公告)号：AT505763T

公开(公告)日：2011-04-15

申请号：AT02701240

申请日：2002-01-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRUECKLMAYR FRANZ-JOSEF ,  FRIEDINGER HANS ,  SEDLAK HOLGER ,  MAY CHRISTIAN

IPC: G06F12/14 ,  G06F21/24

Abstract: A microprocessor circuit for organizing access to data or programs stored in a memory has a microprocessor, a memory for storing an operating system, and a memory for storing individual external programs. A plurality of memory areas with respective address spaces is provided in the memory for storing the external programs. Each address space is assigned an identifier. The identifier assigned to a memory area is loaded into a first auxiliary register prior to the addressing of the memory area and the identifier of the addressed memory area is loaded into a second auxiliary register. A comparison of the contents of the first and second auxiliary registers is performed. Furthermore, each address space of a memory area is assigned at least one bit sequence defining access rights, whereby code instructions and sensitive data can be protected against write accesses from other external programs.

公开(公告)号：DE10303452B4

公开(公告)日：2007-02-08

申请号：DE10303452

申请日：2003-01-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  NOLLES JUERGEN ,  SEDLAK HOLGER

IPC: G06F11/36 ,  G06F9/44 ,  G06F13/14

公开(公告)号：DE50102646D1

公开(公告)日：2004-07-22

申请号：DE50102646

申请日：2001-12-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRUECKLMAYR FRANZ-JOSEF ,  MAY CHRISTIAN ,  POCKRANDT WOLFGANG ,  SEDLAK HOLGER

IPC: G06F12/16 ,  G11C16/10

公开(公告)号：AT257255T

公开(公告)日：2004-01-15

申请号：AT99970480

申请日：1999-10-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  FREIWALD JUERGEN ,  BRIXEL OLAF

IPC: G06F9/42 ,  G06F8/41 ,  G06F9/00 ,  G06F9/45 ,  G06F11/00 ,  G06F12/14

Abstract: An efficient method for protecting entry addresses in computer programs allows direct jumps to permissible entry addresses. The permissible entry addresses are identified with a correlation of data which are not provided within the same individual instruction. By organizing the program code, the compiler or linker ensures that only legal entry addresses satisfy this correlation.