-
公开(公告)号:AU2003233619A8
公开(公告)日:2003-12-12
申请号:AU2003233619
申请日:2003-05-21
Applicant: INTEL CORP
Inventor: ROTH WESTON , JACKSON JAMES , SEARLS DAMION
-
公开(公告)号:HK1050104A1
公开(公告)日:2003-06-06
申请号:HK03102282
申请日:2003-03-31
Applicant: INTEL CORP
Inventor: DISHONGH TERRANCE , SEARLS DAMION , LIAN BIN , DUJARI PRATEEK
IPC: F16F15/02 , F16F20060101 , H05K20060101 , F16F15/00 , G05D19/02 , H05K1/02 , H05K1/18
Abstract: Piezoelectric wafers are affixed to a circuit card to control displacement of the circuit card when vibrated. A trigger wafer located at an anti-node of the dominant mode shape produces a voltage as a function of modal displacement. A control system responsive to the trigger wafer produces voltages that are applied to flex wafers at a different anti-node of the dominant mode shape. The flex wafers expand and contract in a manner that reduces the modal displacement of the circuit card. Multiple flex wafers can exist, affixed to the circuit card substantially opposite each other, or a single flex wafer can exist with a single trigger wafer. The trigger wafer can be located substantially opposite the flex wafer or can be located elsewhere on the circuit card.
-
公开(公告)号:HK1077700B
公开(公告)日:2012-12-07
申请号:HK05112068
申请日:2005-12-29
Applicant: INTEL CORP
Inventor: SEARLS DAMION , RUTTAN THOMAS , MANIK JITEENDER
IPC: H05K20060101 , H01R12/51 , H05K7/10
-
24.
公开(公告)号:DE112009002155T5
公开(公告)日:2012-01-12
申请号:DE112009002155
申请日:2009-08-27
Applicant: INTEL CORP
Inventor: SEARLS DAMION , ROTH WESTON C , RAMIREZ MARGARET D , JACKSON JAMES D , THOMAS RAINER E , GEALER CHARLES A
Abstract: Es werden Ausführungsformen einer Baugruppe auf Systemebene offenbart, die einen Integrierten-Schaltkreis(IC)-Chip enthält, der direkt auf einer Hauptplatine angebracht ist. Ein IC-Chip, der direkt auf einer Hauptplatine oder einer anderen Leiterplatte angebracht ist, kann als ein Direct Chip Attach(DCA)-Chip bezeichnet werden. Ein Gehäuse ist über mindestens einem Abschnitt des DCA-Chips angeordnet und mit der Hauptplatine gekoppelt. Das Gehäuse enthält einen oder mehrere weitere IC-Chip, die auf einem Substrat angeordnet sind. Es werden noch weitere Ausführungsformen beschrieben und beansprucht.
-
公开(公告)号:AT403956T
公开(公告)日:2008-08-15
申请号:AT01979711
申请日:2001-10-12
Applicant: INTEL CORP
Inventor: SEARLS DAMION , DISHONGH TERRANCE , DUJARI PRATEEK , LIAN BIN
Abstract: An enhanced joint thickness lead used for surface mounting electronic devices to a substrate, wherein a portion of the enhanced joint thickness lead that is substantially parallel to the substance. The enhanced joint thickness lead includes an arcuate structure, which provides an enhanced joint thickness for the solder used to connect the lead to the substrate. The enhanced joint thickness of the solder results in a more robust attachment of the electronic device.
-
公开(公告)号:DE60130450D1
公开(公告)日:2007-10-25
申请号:DE60130450
申请日:2001-04-03
Applicant: INTEL CORP
Inventor: DISHONGH TERRANCE , SEARLS DAMION , LIAN BIN , DUJARI PRATEEK
Abstract: Piezoelectric wafers are affixed to a circuit card to control displacement of the circuit card when vibrated. A trigger wafer located at an anti-node of the dominant mode shape produces a voltage as a function of modal displacement. A control system responsive to the trigger wafer produces voltages that are applied to flex wafers at a different anti-node of the dominant mode shape. The flex wafers expand and contract in a manner that reduces the modal displacement of the circuit card. Multiple flex wafers can exist, affixed to the circuit card substantially opposite each other, or a single flex wafer can exist with a single trigger wafer. The trigger wafer can be located substantially opposite the flex wafer or can be located elsewhere on the circuit card.
-
公开(公告)号:AT373943T
公开(公告)日:2007-10-15
申请号:AT01923364
申请日:2001-04-03
Applicant: INTEL CORP
Inventor: DISHONGH TERRANCE , SEARLS DAMION , LIAN BIN , DUJARI PRATEEK
Abstract: Piezoelectric material is embedded in epoxy layers of circuit cards to control thermal expansion and contraction as a function of temperature changes. A temperature sensor and thermostat generates a controlled voltage as a function of temperature and applies the voltage to piezoelectric blocks within the circuit card. Local areas of the circuit card can have different amounts of piezoelectric material or different thermostats. Piezoelectric blocks can be arranged in regular patterns or can be randomly or pseudo-randomly placed.
-
公开(公告)号:HK1077700A1
公开(公告)日:2006-02-17
申请号:HK05112068
申请日:2005-12-29
Applicant: INTEL CORP
Inventor: SEARLS DAMION , RUTTAN THOMAS , MANIK JITEENDER
IPC: H01R12/51 , H05K20060101 , H05K7/10
Abstract: A conventional land grid array (LGA) socket assembly uses the same socket contact in the power delivery area and the signal delivery area. Using low current socket contacts in the power delivery area may create self-heating and limit power delivery from a printed circuit board (PCB) to an IC package mounted in the socket. Embodiments of the present invention are directed to an LGA socket assembly that has a separate power delivery contact, which includes contact pins and contacts pads that are ganged using a cross beam to form a comb-shaped contact. In an alternative embodiment of the present invention, an LGA socket assembly has a shorter channel in the power delivery area than in known LGA socket assemblies. In still another embodiment, an LGA socket assembly has a shorter channel in the power delivery area in the signal delivery area.
-
公开(公告)号:AU4793701A
公开(公告)日:2001-11-12
申请号:AU4793701
申请日:2001-04-03
Applicant: INTEL CORP
Inventor: DISHONGH TERRANCE , SEARLS DAMION , LIAN BIN , DUJARI PRATEEK
Abstract: Piezoelectric wafers are affixed to a circuit card to control displacement of the circuit card when vibrated. A trigger wafer located at an anti-node of the dominant mode shape produces a voltage as a function of modal displacement. A control system responsive to the trigger wafer produces voltages that are applied to flex wafers at a different anti-node of the dominant mode shape. The flex wafers expand and contract in a manner that reduces the modal displacement of the circuit card. Multiple flex wafers can exist, affixed to the circuit card substantially opposite each other, or a single flex wafer can exist with a single trigger wafer. The trigger wafer can be located substantially opposite the flex wafer or can be located elsewhere on the circuit card.
-
-
-
-
-
-
-
-