公开(公告)号：US20180098428A1

公开(公告)日：2018-04-05

申请号：US15283352

申请日：2016-10-01

Applicant: Intel Corporation

Inventor： Fay HUA ,  Brandon M. RAWLINGS ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING

IPC: H05K1/16 ,  H01L23/498 ,  H01L21/48 ,  H05K3/42 ,  H05K3/00 ,  H01L25/16 ,  H05K1/11

Abstract: Embodiments are generally directed to non-planar on-package via capacitor. An embodiment of an embedded capacitor includes a first plate that is formed in a package via; a dielectric layer that is applied on the first plate; and a second plate that is formed in a cavity in the dielectric layer, wherein the first plate and the second plate are non-planar plates.

公开(公告)号：US20240363567A1

公开(公告)日：2024-10-31

申请号：US18140465

申请日：2023-04-27

Applicant: Intel Corporation

Inventor： Bernd WAIDHAS ,  Thomas WAGNER ,  Georg SEIDEMANN ,  Harald GOSSNER ,  Telesphor KAMGAING ,  Shuhei YAMADA ,  Tae Young YANG

IPC: H01L23/00 ,  H01Q1/22 ,  H01Q1/38

CPC classification number: H01L24/08 ,  H01L24/05 ,  H01Q1/2283 ,  H01Q1/38 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/05647 ,  H01L2224/08265 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32265 ,  H01L2924/0665

Abstract: Embodiments disclosed herein include a die module. In an embodiment, the die module comprises a die with a first surface and a second surface. In an embodiment, a first pad is on the second surface of the die, where a top surface of the first pad is substantially coplanar with the second surface. In an embodiment, the die module comprises an antenna module with a third surface and a fourth surface. In an embodiment, a second pad is on the third surface of the antenna module, where a bottom surface of the second pad is substantially coplanar with the third surface. In an embodiment, the top surface of the first pad directly contacts the bottom surface of the second pad.

公开(公告)号：US20240355752A1

公开(公告)日：2024-10-24

申请号：US18138440

申请日：2023-04-24

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/15

CPC classification number: H01L23/5386 ,  H01L21/486 ,  H01L23/15 ,  H01L23/5384 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125

Abstract: Embodiments disclosed herein include a package substrate. In an embodiment, the package substrate comprises a core with a first surface and a second surface, where the core comprises a glass layer. In an embodiment, a first routing layer is over the first surface of the core, where the first routing layer comprises traces with a first width. In an embodiment, a second routing layer is over the second surface of the core, where the second routing layer comprises traces with a second width that is smaller than the first width.

公开(公告)号：US20240021522A1

公开(公告)日：2024-01-18

申请号：US18253945

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Tolga ACIKALIN ,  Tae Young YANG ,  Debabani CHOUDHURY ,  Shuhei YAMADA ,  Roya DOOSTNEJAD ,  Hosein NIKOPOUR ,  Issy KIPNIS ,  Oner ORHAN ,  Mehnaz RAHMAN ,  Kenneth P. FOUST ,  Christopher D. HULL ,  Telesphor KAMGAING ,  Omkar KARHADE ,  Stefano PELLERANO ,  Peter SAGAZIO ,  Sai VADLAMANI

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498 ,  H01Q1/22

CPC classification number: H01L23/5381 ,  H01L25/0652 ,  H01L24/16 ,  H01L23/66 ,  H01L23/49822 ,  H01Q1/2283 ,  H01L24/81 ,  H01L2924/14222 ,  H01L2924/1431 ,  H01L2223/6677 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2224/16235 ,  H01L2224/16146

Abstract: Various devices, systems, and/or methods perform wireless chip to chip high speed data transmission. Strategies for such transmission include use of improved microbump antennas, wireless chip to chip interconnects, precoding and decoding strategies, channel design to achieve spatial multiplexing gain in line of sight transmissions, open cavity chip design for improved transmission, and/or mixed signal channel equalization.

公开(公告)号：US20230411838A1

公开(公告)日：2023-12-21

申请号：US17845830

申请日：2022-06-21

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING

IPC: H01Q1/38 ,  H01L23/66

CPC classification number: H01Q1/38 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2223/6677

Abstract: Embodiments herein relate to systems, apparatuses, techniques or processes directed to a package that include a substrate with a glass core, with one or more grounded coplanar waveguides placed on one or both surfaces of the glass core. The one or more grounded coplanar waveguides may then be used for high-speed communication between two dies, such as a compute die and a memory die, coupled with the substrate. Other embodiments may be described and/or claimed.

公开(公告)号：US20230411350A1

公开(公告)日：2023-12-21

申请号：US17845835

申请日：2022-06-21

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING

IPC: H01L25/065 ,  H01L23/528 ,  H01L23/538 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L25/0655 ,  H01L23/5286 ,  H01L23/5381 ,  H01L23/3121 ,  H01L21/563

Abstract: Embodiments herein relate to systems, apparatuses, or processes for packages that include a high-speed transmission line that is routed from a compute die on a substrate under a silicon die that is next to the compute die on the substrate. The silicon die includes a ground plane above the high-speed transmission line. The high-speed transmission line is at least partially between the ground plane of the silicon die and another ground plane within the substrate. Other embodiments may be described and/or claimed.

公开(公告)号：US20230395578A1

公开(公告)日：2023-12-07

申请号：US17833600

申请日：2022-06-06

Applicant: Intel Corporation

Inventor： Min Suet LIM ,  Kavitha NAGARAJAN ,  Eng Huat GOH ,  Telesphor KAMGAING ,  Chee Kheong YOON ,  Jooi Wah WONG ,  Chu Aun LIM

IPC: H01L25/10 ,  H01L25/065 ,  H01L23/538

CPC classification number: H01L25/105 ,  H01L25/0657 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/1058 ,  H01L2225/1035

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate, and a base coupled to the package substrate. In an embodiment, a die is coupled to the base, and a memory die module is over the die. In an embodiment, the memory die module is communicatively coupled to the die through routing provided on the base

公开(公告)号：US20230395524A1

公开(公告)日：2023-12-07

申请号：US17833580

申请日：2022-06-06

Applicant: Intel Corporation

Inventor： Eng Huat GOH ,  Jiun Hann SIR ,  Chee Kheong YOON ,  Telesphor KAMGAING ,  Min Suet LIM ,  Kavitha NAGARAJAN ,  Chu Aun LIM

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L24/32 ,  H01L24/29 ,  H01L23/66 ,  H01L24/27 ,  H01L24/16 ,  H01L24/73 ,  H01L23/49822 ,  H01L2224/27515 ,  H01L2224/32227 ,  H01L2224/73204 ,  H01L2224/16235 ,  H01L2224/26155 ,  H01L2224/26175 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2924/3511 ,  H01L2924/3025 ,  H01L2924/2027 ,  H01L2924/1421 ,  H01L2224/32237 ,  H01L2224/29018 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2924/0781

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate, and a die coupled to the package substrate. In an embodiment, a stiffener is around the die and over the package substrate. In an embodiment, an electrically non-conductive underfill is around first level interconnects (FLIs) between the package substrate and the die. In an embodiment, an electrically conductive layer is around the non-conductive underfill.

公开(公告)号：US20230207406A1

公开(公告)日：2023-06-29

申请号：US17561730

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Arghya SAIN ,  Andrew P. COLLINS ,  Sivaseetharaman PANDI ,  Jianyong XIE ,  Telesphor KAMGAING

IPC: H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/15 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/15311

Abstract: Embodiments disclosed herein include a package core. In an embodiment, the package core includes a first layer, where the first layer comprises glass. In an embodiment, a second layer is over the first layer, where the second layer comprises glass. In an embodiment, a third layer is over the second layer, where the third layer comprises glass. In an embodiment, a first trace is between the first layer and the second layer. In an embodiment, a second trace is between the second layer and the third layer.

公开(公告)号：US20230197618A1

公开(公告)日：2023-06-22

申请号：US17557585

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING

IPC: H01L23/538 ,  H01L23/29 ,  H01L23/00

CPC classification number: H01L23/5383 ,  H01L23/291 ,  H01L24/05 ,  H01L2224/05188 ,  H01L2224/05008

Abstract: Embodiments herein relate to systems, apparatuses, techniques, or processes for packages that include multiple glass layers within the package. In embodiments, a core of the package may include multiple glass layers that may be bonded together, or may be separated by a dielectric layer between glass layers. In embodiments, the glass layers may include one or more electrically conductive features, such as conductive vias, conductive planes, electrical pads, electrical traces, redistribution layer, capacitors, inductors, active dies and/or passive dies. Other embodiments may be described and/or claimed.