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公开(公告)号:US20230096154A1
公开(公告)日:2023-03-30
申请号:US17484323
申请日:2021-09-24
Applicant: Intel Corporation
Inventor: Siddhartha Selvaraj , Pannerkumar Rajagopal , Devanathan Kannan
Abstract: A chassis structure of an apparatus contains a battery. Charger circuitry is operable to provide charge to the battery. Discharge circuitry is operable to receive charge from the battery. Switch circuitry is coupled between the battery and each of the charger circuitry, the discharge circuitry, and a load. A connector at an exterior surface of the chassis couples the apparatus to a power supply. The switch circuitry is coupled to the connector via the charger circuitry. A first control activable at the exterior surface of the chassis structure is operable to generate, in response to being activated, a first control signal to request a first switch state wherein the battery is electrically coupled to the discharge circuitry. A controller circuit coupled to receive the first control signal from the first control and, based on the first control signal, to operate the switch circuitry to provide the first switch state.
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公开(公告)号:US11422173B2
公开(公告)日:2022-08-23
申请号:US17109031
申请日:2020-12-01
Applicant: Intel Corporation
Inventor: Sriram Ranganathan , Naveen G , Pannerkumar Rajagopal , Govindaraj Gettimalli , Javahar Ragothaman
IPC: G01R21/133 , G06F1/32 , G06F1/3234 , G06F1/3246
Abstract: A Power Management Controller (PMC) which manages power states of a platform, informs a power accumulator device to start measuring the platform power during entry into the low power state (e.g., S0iX). The power accumulator device starts measuring the power until a stop message comes from the PMC. The PMC on detection of any wake event initiates a stop message to the power accumulator device. Once an operating system (OS) context is restored, software can read the measured data from the power accumulator device. The measured data is accessible to a host software using standard software application programming interface (API) and can be used to influence the power policies of the system.
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公开(公告)号:US20220206591A1
公开(公告)日:2022-06-30
申请号:US17698712
申请日:2022-03-18
Applicant: Intel Corporation
Inventor: Sagar Pawar , Raghavendra Nagaraj , Prakash Pillai , Ovais Pir , Pannerkumar Rajagopal
Abstract: Methods and apparatus for adaptive keyboard scanning are disclosed. A disclosed example apparatus to adaptively control operation of a keyboard includes at least one memory, instructions, and processor circuitry. The processor circuitry is to determine whether to operate the keyboard in a first mode or in a second mode different from the first mode, the first mode corresponding to a first number of keys, the second mode corresponding to a second number of keys less than the first number of keys, and set the keyboard to operate in the first mode or the second mode based on the determination.
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公开(公告)号:US20210026649A1
公开(公告)日:2021-01-28
申请号:US17028315
申请日:2020-09-22
Applicant: Intel Corporation
Inventor: Karunakara Kotary , Pannerkumar Rajagopal , Satish Muthiyalu , Rajesh Poornachandran
IPC: G06F9/4401 , G06F9/451 , G06F9/445 , G06F12/0873 , G06F11/30 , G06F11/34 , G06F13/16 , G06F13/40 , G06F1/3212 , G11C11/406
Abstract: Systems, apparatuses and methods may provide for technology that enables, during a boot sequence, a first set of ranks in a memory module based on a battery status and a user interface and disables, during the boot sequence, a second set of ranks in the memory module based on the battery status and the user interface. The technology may also generate a map between a system address space and a first set of banks in the first set of ranks and exclude a second set of banks in the first set of ranks from the map.
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