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公开(公告)号：AU7706198A
公开(公告)日：1998-12-30
申请号：AU7706198
申请日：1998-05-29
Applicant: MICRON TECHNOLOGY INC
Inventor： KEETH BRENT , BUNKER LAYNE G , DERNER SCOTT J , TAYLOR RONALD L JR , MULLIN JOHN S , BEFFA RAYMOND J , ROSS FRANK F , KINSMAN LARRY D
IPC: G11C11/401 , G11C5/02 , G11C5/06 , G11C11/407 , G11C11/4074 , G11C11/4076 , G11C11/4097 , G11C29/04 , G11C29/14 , H01L21/8242 , H01L27/108 , G11C7/00
Abstract: A 256 Meg dynamic random access memory is comprised of a plurality of cells organized into individual arrays, with the arrays being organized into 32 Meg array blocks, which are organized into 64 Meg quadrants. In certain of the gap cells, multiplexers are provided to transfer signals from I/O lines to datalines. A power bus is provided which minimizes routing of externally supplied voltages, completely rings each of the array blocks, and provides gridded power distribution within each of the array blocks. A plurality of power supplies are organized to match their power output to the power demand and to maintain a desired ratio of power production capability and decoupling capacitance. A powerup sequence circuit is provided to control the powerup of the chip.
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公开(公告)号：WO2008112101A2
公开(公告)日：2008-09-18
申请号：PCT/US2008002875
申请日：2008-03-05
Applicant: MICRON TECHNOLOGY INC , ENGLAND LUKE , KINSMAN LARRY D
Inventor： ENGLAND LUKE , KINSMAN LARRY D
CPC classification number: H01L27/14634 , H01L21/6835 , H01L21/76898 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L24/27 , H01L27/14636 , H01L2221/6834 , H01L2221/68345 , H01L2221/6835 , H01L2221/68377 , H01L2223/6622 , H01L2224/02372 , H01L2224/0401 , H01L2224/12105 , H01L2224/13024 , H01L2224/131 , H01L2224/221 , H01L2224/274 , H01L2224/48091 , H01L2224/82039 , H01L2924/01006 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/14 , H01L2924/16151 , H01L2924/16152 , H01L2924/16235 , H01L2924/181 , H01L2924/00014 , H01L2924/014 , H01L2924/00
Abstract: An imager device is disclosed which includes at least one photosensitive element positioned on a front surface of a substrate and a conductive structure extending at least partially through an opening defined in the substrate to conductively couple to an electrical contact or bond pad on the first surface. An insulating material of a conductive laminate film and/or a mold compound material is positioned within the opening between at least a portion of the conductive structure and the substrate. Also disclosed is a device that comprises a substrate and a plurality of openings in the substrate, wherein each of the openings is adapted to be positioned above an imager device when the substrate is positioned above and secured to an imager substrate. A method of forming an imager device is also disclosed.
Abstract translation: 公开了一种成像器件，其包括位于衬底的前表面上的至少一个感光元件和至少部分延伸通过限定在衬底中的开口的导电结构，以导电地耦合到第一表面上的电触点或接合焊盘。 导电层压膜和/或模具复合材料的绝缘材料位于导电结构的至少一部分和基板之间的开口内。 还公开了一种装置，其包括衬底和衬底中的多个开口，其中当衬底位于成像器衬底上方并固定到成像器衬底上时，每个开口适于定位在成像器装置上方。 还公开了一种形成成像器件的方法。
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公开(公告)号：US6680534B2
公开(公告)日：2004-01-20
申请号：US97494701
申请日：2001-10-10
Applicant: MICRON TECHNOLOGY INC
Inventor： KINSMAN LARRY D
CPC classification number: H05K1/115 , H01L23/49827 , H01L2924/0002 , H05K3/4602 , H05K2201/0949 , H05K2201/09609 , H05K2201/09836 , H05K2201/09945 , H01L2924/00
Abstract: The present invention is directed to an apparatus and method for connecting integrated circuits placed on opposite sides of a circuit board through utilization of conduction elements embedded in the circuit board and extending from one surface of the board to the other. Conductive traces extend along the surface of the circuit board from the conduction elements to the integrated circuits. The conductive traces may be formed from multiple conductive layers.
Abstract translation: 本发明涉及一种用于连接放置在电路板的相对侧上的集成电路的装置和方法，该集成电路通过利用嵌入电路板中的导电元件并从板的一个表面延伸到另一个表面。 导电迹线沿着电路板的表面从导电元件延伸到集成电路。 导电迹线可以由多个导电层形成。
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