Lead frame and resin-sealed semiconductor device, and its manufacturing method
    21.
    发明专利
    Lead frame and resin-sealed semiconductor device, and its manufacturing method 审中-公开
    引线框架和树脂密封半导体器件及其制造方法

    公开(公告)号:JP2004228184A

    公开(公告)日:2004-08-12

    申请号:JP2003011883

    申请日:2003-01-21

    CPC classification number: H01L2224/48091 H01L2224/48247 H01L2924/00014

    Abstract: PROBLEM TO BE SOLVED: To provide a lead frame capable of preventing disconnection of a bonding wire and exposure of a part of a die pad from a resin sealed part by eliminating inclination of the die pad during resin sealing, and to provide a resin-sealed semiconductor device and its manufacturing method.
    SOLUTION: The resin-sealed semiconductor device in which a semiconductor chip is mounted on the surface of the die pad, and an outside lead is exposed from the resin sealed part of the die pad rear face side of the die pad is characterized in that a support part, on which a pin supporting the die pad contacts, is formed on the rear face of the die pad during resin sealing.
    COPYRIGHT: (C)2004,JPO&NCIPI

    Abstract translation: 解决的问题:提供一种能够防止接合线断开的引线框架,并且通过消除树脂密封期间的管芯焊盘的倾斜而使树脂密封部分的一部分裸露焊盘的露出,并且提供 树脂密封半导体器件及其制造方法。 解决方案:将芯片垫的表面上安装有半导体芯片的树脂密封半导体器件和外部引线从芯片焊盘的芯片垫背面侧的树脂密封部分露出的特征在于 在树脂密封期间,在模垫的后表面上形成有支撑模片垫的销接触的支撑部。 版权所有(C)2004,JPO&NCIPI

    LEAD FRAME AND SEMICONDUCTOR DEVICE USING THE SAME

    公开(公告)号:JP2003197846A

    公开(公告)日:2003-07-11

    申请号:JP2001398158

    申请日:2001-12-27

    Abstract: PROBLEM TO BE SOLVED: To provide a reliable semiconductor device which has a good adhesion with a sealing resin and has no short defects at the time of mounting. SOLUTION: A lead frame comprises a semiconductor chip mounting area 1 to mount a semiconductor chip 4 and a plurality of leads 2 formed at a prescribed distance from the semiconductor chip mounting area 1. The semiconductor chip mounting area 1 has a bottom face located at a higher position than those of the leads 2, and has at least one projecting part 1P projecting from the bottom face, with the end face of the projecting part being flush with the bottom faces of the leads 2. COPYRIGHT: (C)2003,JPO

    MANUFACTURING METHOD OF LAMINATED CORE

    公开(公告)号:JP2001327129A

    公开(公告)日:2001-11-22

    申请号:JP2000145919

    申请日:2000-05-18

    Abstract: PROBLEM TO BE SOLVED: To obtain a laminated core which is free from disturbance of a flow of a flux and has excellent characteristics by a method wherein, when the core is manufactured by punching out rotor core segments and stator core segments from the same metal sheet, pole teeth of coarsely punched stator core segments are extended stably into hollow parts formed by punching out rotor core segments by pressing, allowances for punching pole tooth tip ends, of which the inner formes of the stator core segments are composed, are secured sufficiently, punching can be practiced without trouble even if gaps between the stator core segments and the rotor core segments are small and a variation in unevenness of plate surfaces caused by pressing is small. SOLUTION: Rotor core segments are punched out from metal sheets and laminated. Pole teeth 7 of stator core segments are coarsely punched out from the metal sheets from which the rotor core segments are punched out beforehand. Pluralities of different positions of the respective pole teeth 7 are pressed to make the thicknesses 10 and 11 thin so as to extend toward the punched sides of the rotor core segments. Then pole tooth tip ends 8, of which the inner forms of the stator core segments are composed, are formed by punching, the outer formes of the stator core segments are formed by punching and the stator core segments are laminated.

    METHOD OF MANUFACTURING BALL DIODE SUBSTRATE

    公开(公告)号:JP2001230439A

    公开(公告)日:2001-08-24

    申请号:JP2000034570

    申请日:2000-02-14

    Abstract: PROBLEM TO BE SOLVED: To previously form a ball cell substrate, to remove the diffusion layer of second conductivity tape silicon along a spherical outline without local heating, to expose first conductivity type silicon and to form a ball diode substrate. SOLUTION: A first process for preparing a ball cell having a spherical substrate constituting first conductivity type silicon and second conductivity type silicon made to form p-n junction on the surface, a second process for arraying plural ball cells in a matrix shape, exposing a part of or whole hemispheres of second conductivity type silicon in the ball cells by sealing resin, and forming a ball cell substrate where the ball cells are mutually connected; and a third process for spraying abrasive grains to the exposed second conductive silicon of the ball cell substrate with prescribed jet pressure by a sand blasting method, removing the exposed part of second conductivity type silicon and exposing first conductivity type silicon; are given.

    METHOD OF MANUFACTURING SOLAR CELL AND SOLAR CELL

    公开(公告)号:JP2001230429A

    公开(公告)日:2001-08-24

    申请号:JP2000040512

    申请日:2000-02-18

    Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a solar cell which can radically solve an electrical short circuit problems in an assembling process and manufacture the solar cell of high quality at high yield, and the solar cell. SOLUTION: A plurality of first conductivity type spherical substrates 11 are bonded to a sheet-like module substrate 13 with a conductive paste 12 and a second conductivity type surface layer 15 doped with the second conductivity type impurities is formed on the surfaces of the spherical substrates 11. Further, a transparent electrode material 16 is deposited on the outside of the second conductivity type surface layer 15 and the electrode material 16 is electrically insulated from the module substrate 13 by an insulating resin 14.

    MANUFACTURE OF SEMICONDUCTOR DEVICE

    公开(公告)号:JPH10275785A

    公开(公告)日:1998-10-13

    申请号:JP9488797

    申请日:1997-03-28

    Abstract: PROBLEM TO BE SOLVED: To make clear an accessory printing and at the same time prevent a semiconductor element from being cracked, by joining a number of semiconductor elements and a semiconductor device wafer body onto a UV sheet where a gel-shaped, thermosetting, and colored epoxy resin layer is provided, cutting it, and separating it individually while leaving the UV sheet. SOLUTION: A gel-shaped, thermosetting, and colored epoxy resin layer 14 is applied to one surface of a UV sheet 22. A semiconductor device wafer that is connected to a plurality of semiconductor element 11 are prepared. A semiconductor device wafer is subjected to dicing by a dicing line 28 for separating for each semiconductor device. The dicing is made so that all or one portion of the UV sheet 22 at the surface side of the semiconductor element 11 can remain. Ultraviolet rays are applied to the UV sheet 22 for softening, and a specific semiconductor device is separated from the sheet 22. An accessory 21 is printed to the surface side of the individual semiconductor device being taken out with an ink having a different color, thus clearing recognizing the printing and further protecting the semiconductor element 11.

    LEAD FRAME AND SEMICONDUCTOR DEVICE

    公开(公告)号:JPH07245374A

    公开(公告)日:1995-09-19

    申请号:JP5986594

    申请日:1994-03-03

    Abstract: PURPOSE:To enable fixing without generating distortion and displacement in inner leads, and without generating displacement and step-difference in a substrate, by connecting the intermediate parts of inner leads by using fused baking glass of low melting point. CONSTITUTION:A chip 11 is fixed to the central part of a substrate 10 via adhesive agent 12. The arrangement position of the chip 11 corresponds to the chip arrangement region of a lead frame. Inner leads 2 are fixed to the peripheral part of the substrate 10 via low melting point glass 13. The inner leads 2 are heated at the time of fixing, but displacement and step-difference are not generated because the inner leads 2 are previouly connected at intermediate parts by using fused baking glass 9. Since thermal expansion difference hardly exists and is small, thermal stress is not generated, displacement and step-difference are not present, so that the connection state or the like of bonding wires 14 is stabilized. The substrate is covered with a cap 15, which is connected with the inner leads 2 by using the low melting point glass 13.

    SEMICONDUCTOR DEVICE
    30.
    发明专利

    公开(公告)号:JPH06177317A

    公开(公告)日:1994-06-24

    申请号:JP35169892

    申请日:1992-12-07

    Abstract: PURPOSE:To wiring in an intersecting state, and prevent short avoid circuit between wires connected with a semiconductor element, by installing a fame type flat part serving as the common lead of either one of a power supply of a conducting plate or a lead for grounding. CONSTITUTION:An element 25 is mounted, via adhesive agent, on the upper surface of an element mounting part 29 of a conducting plate 23 of a multilayered lead frame 11. A wire bonding part 15 of the tip part of an inner lead and the electrode terminal of the semiconductor element 25 form an electric circuit by connecting them by using wires 26 directly connecting both terminals, wires connecting a flat part 21 turning to the common lead of the conducting plate 23 and power supply leads of inner leads 13a, and wires indirectly connecting them via a flat part 21. Thereby wiring in an intersecting state is avoided, short circuit between wires connected with a semiconductor element is prevented, and the increase and the design of electrode terminals of an element are facilitated.

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