公开(公告)号：FR2729026B1

公开(公告)日：1997-07-25

申请号：FR9513455

申请日：1995-11-14

Applicant: MOTOROLA INC

Inventor： SMITH PAUL FIELDING ,  SMITH JOHN M ,  ROTTINGHAUS ALAN P ,  RADER SHELIA MARIE ,  PINCKLEY DANNY THOMAS ,  LUZ YUDA YEHUDA ,  LUREY DANIEL MORRIS ,  LAIRD KEVIN M ,  KOBRINETZ TONY ,  ELDER ROBERT C

IPC: H03D7/00 ,  H01Q1/24 ,  H01Q3/26 ,  H03B28/00 ,  H03C1/00 ,  H03C3/00 ,  H03D7/16 ,  H04B1/04 ,  H04B1/16 ,  H04B1/26 ,  H04B1/28 ,  H04B1/38 ,  H04B1/40 ,  H04B7/04 ,  H04B7/06 ,  H04B7/08 ,  H04B7/185 ,  H04B7/24 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04W4/18 ,  H04W88/06 ,  H04Q7/20

Abstract: A multi-channel digital transceiver (400) receives uplink radio frequency signals and converts these signals to digital intermediate frequency signals. Digital signal processing, including a digital converter module (426), is employed to select digital intermediate frequency signals received at a plurality of antennas (412) and to convert these signals to baseband signals. The baseband signals are processed to recover a communication channel therefrom. Downlink baseband signals are also processed and digital signal processing within the digital converter module (426) up converters and modulates the downlink baseband signals to digital intermediate frequency signals. The digital intermediate frequency signals are converted to analog radio frequency signals, amplified and radiated from transmit antennas (420).

公开(公告)号：FI972748A0

公开(公告)日：1997-06-25

申请号：FI972748

申请日：1997-06-25

Applicant: MOTOROLA INC

Inventor： LUREY DANIEL MORRIS ,  ROTTINGHAUS ALAN P ,  RADER SHEILA MARIE ,  LUZ YUDA YEHUDA ,  SMITH PAUL FIELDING ,  SMITH JOHN M ,  PINCKLEY DANNY THOMAS ,  LAIRD KEVIN MICHAIL ,  KOBRINETZ TONY ,  ELDER ROBERT C ,  BAILEY DONALD E

IPC: H04L27/18 ,  H01Q1/24 ,  H01Q3/26 ,  H03D3/00 ,  H03M1/12 ,  H04B1/04 ,  H04B1/26 ,  H04B1/28 ,  H04B7/06 ,  H04B7/08 ,  H04B7/24 ,  H04J1/05 ,  H04L1/06 ,  H04L1/22 ,  H04L25/14 ,  H04L27/26 ,  H04W88/08 ,  H04B

公开(公告)号：DE19581527T1

公开(公告)日：1997-05-07

申请号：DE19581527

申请日：1995-12-05

Applicant: MOTOROLA INC

Inventor： SMITH PAUL FIELDING ,  SMITH JOHN M ,  ROTTINGHAUS ALAN P ,  RADER SHELIA MARIE ,  PINCKLEY DANNY THOMAS ,  LUZ YUDA YEHUDA ,  LUREY DANIEL MORRIS ,  LAIRD KEVIN MICHAEL ,  KOBRINETZ TONY ,  ELDER ROBERT C ,  BAILEY DONALD E

IPC: H03D7/00 ,  H01Q1/24 ,  H01Q3/26 ,  H03B28/00 ,  H03C1/00 ,  H03C3/00 ,  H03D7/16 ,  H04B1/04 ,  H04B1/16 ,  H04B1/26 ,  H04B1/28 ,  H04B1/38 ,  H04B1/40 ,  H04B7/04 ,  H04B7/06 ,  H04B7/08 ,  H04B7/185 ,  H04B7/24 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04W4/18 ,  H04W88/06 ,  H04Q7/20 ,  H04L27/32

Abstract: A multi-channel digital transceiver (400) receives uplink radio frequency signals and converts these signals to digital intermediate frequency signals. Digital signal processing, including a digital converter module (426), is employed to select digital intermediate frequency signals received at a plurality of antennas (412) and to convert these signals to baseband signals. The baseband signals are processed to recover a communication channel therefrom. Downlink baseband signals are also processed and digital signal processing within the digital converter module (426) up converters and modulates the downlink baseband signals to digital intermediate frequency signals. The digital intermediate frequency signals are converted to analog radio frequency signals, amplified and radiated from transmit antennas (420).

公开(公告)号：FI964824A0

公开(公告)日：1996-12-02

申请号：FI964824

申请日：1996-12-02

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04B

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：AU5356696A

公开(公告)日：1996-10-23

申请号：AU5356696

申请日：1996-02-29

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：AU4610796A

公开(公告)日：1996-09-04

申请号：AU4610796

申请日：1995-12-28

Applicant: MOTOROLA INC

Inventor： LUZ YUDA YEHUDA ,  LONG JAMES FRANK

IPC: H03D7/00 ,  H01Q1/24 ,  H01Q3/26 ,  H03B28/00 ,  H03C1/00 ,  H03C3/00 ,  H03D7/16 ,  H03M1/08 ,  H03M1/66 ,  H03M7/36 ,  H04B1/04 ,  H04B1/16 ,  H04B1/26 ,  H04B1/28 ,  H04B1/38 ,  H04B1/40 ,  H04B7/04 ,  H04B7/06 ,  H04B7/08 ,  H04B7/185 ,  H04B7/24 ,  H04B14/04 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04W4/18 ,  H04W88/06

Abstract: In a quantization noise reduction circuit (200), a feedback signal (W)is added to an input signal (X) to the quantization circuit to reduce quantization noise. The feedback signal is generated as a filtered difference between a sample of a N bit signal (X') and a time coincident sample of a M bit quantized signal, where M

公开(公告)号：EP0903009A4

公开(公告)日：2004-03-03

申请号：EP97916981

申请日：1997-03-24

Applicant: MOTOROLA INC

Inventor： LUZ YUDA YEHUDA

IPC: H03F3/68 ,  H03F1/32 ,  H03F3/60

CPC classification number: H03F1/3252 ,  H03F3/60

Abstract: An input signal (102) and a dithering signal (106) are coupled to an input of an n by m transform matrix (98). The input signal (102) and the dithering signal (106) are transformed to produce m transformed signals, which are then amplified using a plurality of amplifiers (64). The amplified signals are then input into an m by n inverse transform matrix (100) that performs an inverse transform to produce a low noise output signal. The low noise output signal may be passed through a band pass filter (74) to remove out-of-band noise derived from the dithering signal and provide a filtered output signal (110). The transform matrix (98) and inverse transform matrix (100) may be implemented with Fourier transform matrices or a Butler transform matrices.

公开(公告)号：EP1238465A4

公开(公告)日：2002-10-30

申请号：EP01926480

申请日：2001-03-30

Applicant: MOTOROLA INC

Inventor： JALLOUL LOUAY ,  TENBROOK KEITH A ,  CHEN JIANGNAN ,  ROTSTEIN RON ,  LUZ YUDA YEHUDA

IPC: H04W36/14 ,  H04W36/18 ,  H04Q7/38

CPC classification number: H04W36/18 ,  H04W36/0055 ,  H04W36/14 ,  H04W36/30

Abstract: A soft handoff operation is provided for a first signal transmitted according to a first communication standard (IS-95B) and a second signal transmitted according to a second communication standard (IS-95C). A mobile station (MS) (204) receives the first signal, detects a pilot signal, measures pilot signal strength, and transmits a pilot strength measurement message. When the MS fails to receive a handoff direction message after transmitting the pilot strength message, the MS searches for a detecting presence of a broadcast control channel (BCCH) associated with a type IS-95C cell site (202) and measures a carrier-to-interference ratio of the BCCH. The MS compares the carrier-to-interference ratio to a threshold, and when the ratio is above the threshold, initiates a second communication according to the IS-95C standard, thus initiating a soft handoff operation and allowing cell sites (202, 203) to transmit information according to the IS-95C and IS-95B standards, respectively.

公开(公告)号：FI116340B

公开(公告)日：2005-10-31

申请号：FI990786

申请日：1999-04-09

Applicant: MOTOROLA INC

Inventor： SCHIEMENZ ARTHUR F ,  LUZ YUDA YEHUDA ,  ANDERSON DALE R ,  JALLOUL LOUAY A

IPC: H03F3/60 ,  H03F3/68 ,  H04B1/04

Abstract: In a hybrid matrix amplifier array (100), a configurable digital transform matrix (116) is initialize with a matrix of transform coefficients. A plurality of digital input signals (M1-M4) are received at inputs of the configurable digital transform matrix (116). The plurality of digital input signals are transformed to produce a plurality of transform digital signals (A1-A4) using the matrix of transform coefficients. The plurality of transform digital signals are converted to a plurality of transformed analoged signals (206) to produce a plurality of transformed analog signals. The transformed analog signals are amplified (104, 208) to produce amplified transformed signals. Finally, the amplified transformed signals are inverse transformed (102, 210) to produce output signals that correspond to a respective digital input signal (M1-M4). Upon sensing a failure in an amplifier array (104,126) a controller (128) recalls matrix transform coefficients from a memory (130) and write and reconfigures the digital transform matrix (116) to minimize the effects of the amplifier failure at the hybrid matrix amplifier outputs (132).

公开(公告)号：FR2732535B1

公开(公告)日：2002-11-29

申请号：FR9603788

申请日：1996-03-27

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN P ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04L27/00

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.