公开(公告)号：EP0800737A4

公开(公告)日：2002-07-24

申请号：EP95944265

申请日：1995-12-28

Applicant: MOTOROLA INC

Inventor： LUREY DANIEL MORRIS ,  ROTTINGHAUS ALAN P ,  RADER SHEILA MARIE ,  LUZ YUDA YEHUDA ,  SMITH PAUL FIELDING ,  SMITH JOHN M ,  PINCKLEY DANNY THOMAS ,  LAIRD KEVIN MICHAEL ,  KOBRINETZ TONY ,  ELDER ROBERT C ,  BAILEY DONALD E

IPC: H04L27/18 ,  H01Q1/24 ,  H01Q3/26 ,  H03D3/00 ,  H03M1/12 ,  H04B1/04 ,  H04B1/26 ,  H04B1/28 ,  H04B7/06 ,  H04B7/08 ,  H04B7/24 ,  H04J1/05 ,  H04L1/06 ,  H04L1/22 ,  H04L25/14 ,  H04L27/26 ,  H04W88/08 ,  H04L27/06 ,  H04B7/04 ,  H04L27/20

CPC classification number: H04B7/0691 ,  H01Q1/246 ,  H01Q3/2605 ,  H03D3/006 ,  H03M1/121 ,  H04B1/0003 ,  H04B1/001 ,  H04B1/0032 ,  H04B1/26 ,  H04B1/28 ,  H04B7/06 ,  H04B7/0802 ,  H04B7/0874 ,  H04B7/24 ,  H04J1/05 ,  H04L1/06 ,  H04L1/22 ,  H04L25/14 ,  H04L27/2647 ,  H04W88/08

Abstract: A digital receiver (200) and a transmitter (300), wherein the digital receiver includes a plurality of antennas (202) for receiving uplink radio frequency signals; a plurality of analog to digital converters (210) for converting the received radio frequency signals into digital signals; a switched digital down converter (214) for down converting one of the digital signals to a baseband IF signal; and a channel processor (228) for recovering one of a plurality of communication channels contained within the baseband IF signal.

公开(公告)号：FR2732535B1

公开(公告)日：2002-11-29

申请号：FR9603788

申请日：1996-03-27

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN P ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04L27/00

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：IT1284306B1

公开(公告)日：1998-05-18

申请号：ITRM960188

申请日：1996-03-25

Applicant: MOTOROLA INC

Inventor： LUZ YUDA YEHUDA ,  ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：AU686046B2

公开(公告)日：1998-01-29

申请号：AU4610696

申请日：1995-12-28

Applicant: MOTOROLA INC

Inventor： LUREY DANIEL MORRIS ,  ROTTINGHAUS ALAN P ,  RADER SHEILA MARIE ,  LUZ YUDA YEHUDA ,  SMITH PAUL FIELDING ,  SMITH JOHN M ,  PINCKLEY DANNY THOMAS ,  LAIRD KEVIN MICHAEL ,  KOBRINETZ TONY ,  ELDER ROBERT C ,  BAILEY DONALD E

IPC: H04L27/18 ,  H01Q1/24 ,  H01Q3/26 ,  H03D3/00 ,  H03M1/12 ,  H04B1/04 ,  H04B1/26 ,  H04B1/28 ,  H04B7/06 ,  H04B7/08 ,  H04B7/24 ,  H04J1/05 ,  H04L1/06 ,  H04L1/22 ,  H04L25/14 ,  H04L27/26 ,  H04W88/08 ,  H04L27/06 ,  H04L27/20

公开(公告)号：FR2738428A1

公开(公告)日：1997-03-07

申请号：FR9610368

申请日：1996-08-22

Applicant: MOTOROLA INC

Inventor： SMITH PAUL FIELDING ,  SMITH JOHN M ,  ROTTINGHAUS ALAN P ,  RADER SHELIA MARIE ,  PINCKLEY DANNY THOMAS ,  LUZ YUDA YEHUDA ,  LUREY DANIEL MORRIS ,  LAIRD KEVIN M ,  KOBRINETZ TONY ,  ELDER ROBERT C

IPC: H03D7/00 ,  H01Q1/24 ,  H01Q3/26 ,  H03B28/00 ,  H03C1/00 ,  H03C3/00 ,  H03D7/16 ,  H04B1/04 ,  H04B1/16 ,  H04B1/26 ,  H04B1/28 ,  H04B1/38 ,  H04B1/40 ,  H04B7/04 ,  H04B7/06 ,  H04B7/08 ,  H04B7/185 ,  H04B7/24 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04W4/18 ,  H04W88/06 ,  H04Q7/20

Abstract: A multi-channel digital transceiver (400) receives uplink radio frequency signals and converts these signals to digital intermediate frequency signals. Digital signal processing, including a digital converter module (426), is employed to select digital intermediate frequency signals received at a plurality of antennas (412) and to convert these signals to baseband signals. The baseband signals are processed to recover a communication channel therefrom. Downlink baseband signals are also processed and digital signal processing within the digital converter module (426) up converters and modulates the downlink baseband signals to digital intermediate frequency signals. The digital intermediate frequency signals are converted to analog radio frequency signals, amplified and radiated from transmit antennas (420).

公开(公告)号：SE9604433D0

公开(公告)日：1996-12-02

申请号：SE9604433

申请日：1996-12-02

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04B

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：FI964824A

公开(公告)日：1996-12-02

申请号：FI964824

申请日：1996-12-02

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04B

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：CA2191098A1

公开(公告)日：1996-10-10

申请号：CA2191098

申请日：1996-02-29

Applicant: MOTOROLA INC

Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04L27/12

Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

公开(公告)号：FI115431B

公开(公告)日：2005-04-29

申请号：FI972748

申请日：1997-06-25

Applicant: MOTOROLA INC

Inventor： LUREY DANIEL MORRIS ,  ROTTINGHAUS ALAN P ,  RADER SHEILA MARIE ,  LUZ YUDA YEHUDA ,  SMITH PAUL FIELDING ,  SMITH JOHN M ,  PINCKLEY DANNY THOMAS ,  LAIRD KEVIN MICHAEL ,  KOBRINETZ TONY ,  ELDER ROBERT C ,  BAILEY DONALD E

IPC: H04L27/18 ,  H01Q1/24 ,  H01Q3/26 ,  H03D3/00 ,  H03M1/12 ,  H04B1/04 ,  H04B1/26 ,  H04B1/28 ,  H04B7/06 ,  H04B7/08 ,  H04B7/24 ,  H04J1/05 ,  H04L1/06 ,  H04L1/22 ,  H04L25/14 ,  H04L27/26 ,  H04W88/08 ,  H04B7/04

公开(公告)号：CA2182382C

公开(公告)日：2001-06-05

申请号：CA2182382

申请日：1995-12-05

Applicant: MOTOROLA INC

Inventor： PINCKLEY DANNY THOMAS ,  LUZ YUDA YEHUDA ,  LUREY DANIEL MORRIS ,  LAIRD KEVIN MICHAEL ,  KOBRINETZ TONY ,  ELDER ROBERT C ,  SMITH PAUL FIELDING ,  SMITH JOHN M ,  ROTTINGHAUS ALAN P ,  RADER SHELIA MARIE ,  BAILEY DONALD E

IPC: H03D7/00 ,  H01Q1/24 ,  H01Q3/26 ,  H03B28/00 ,  H03C1/00 ,  H03C3/00 ,  H03D7/16 ,  H04B1/04 ,  H04B1/16 ,  H04B1/26 ,  H04B1/28 ,  H04B1/38 ,  H04B1/40 ,  H04B7/04 ,  H04B7/06 ,  H04B7/08 ,  H04B7/185 ,  H04B7/24 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04W4/18 ,  H04W88/06 ,  H04Q7/20

Abstract: A multi-channel digital transceiver (400) receives uplink radio frequency signals and converts these signals to digital intermediate frequency signals. Digital signal processing, including a digital converter module (426), is employed to select digital intermediate frequency signals received at a plurality of antennas (412) and to convert these signals to baseband signals. The baseband signals are processed to recover a communication channel therefrom. Downlink baseband signals are also processed and digital signal processing within the digital converter module (426) up converts and modulates the downlink baseband signals to digital intermediate frequency signals. The digital intermediate frequency signals are converted to analog radio frequency signals, amplified and radiated from transmit antennas (420).