Abstract:
An apparatus amplifies RF signals in a communication system by using a first directional coupler having at least two inputs and at least two outputs; at least two RF amplifiers, where an input of each RF amplifier is connected to a different one of the at least two outputs of the first directional coupler; and a second directional coupler having at least two inputs and at least two outputs, where each one of the at least two inputs is connected to an output of a different one of the at least two RF amplifiers. The at least two outputs of the second directional coupler are connected to at least two antennas, respectively.
Abstract:
A soft handoff operation is provided for a first signal transmitted according to a first communication standard (IS-95B) and a second signal transmitted according to a second communication standard (IS-95C). A mobile station (MS) (204) receives the first signal, detects a pilot signal, measures pilot signal strength, and transmits a pilot strength measurement message. When the MS fails to receive a handoff direction message after transmitting the pilot strength message, the MS searches for a detecting presence of a broadcast control channel (BCCH) associated with a type IS-95C cell site (202) and measures a carrier-to-interference ratio of the BCCH. The MS compares the carrier-to-interference ratio to a threshold, and when the ratio is above the threshold, initiates a second communication according to the IS-95C standard, thus initiating a soft handoff operation and allowing cell sites (202, 203) to transmit information according to the IS-95C and IS-95B standards, respectively.
Abstract:
A digital receiver (200) and a transmitter (300), wherein the digital receiver includes a plurality of antennas (202) for receiving uplink radio frequency signals; a plurality of analog to digital converters (210) for converting the received radio frequency signals into digital signals; a switched digital down converter (214) for down converting one of the digital signals to a baseband IF signal; and a channel processor (228) for recovering one of a plurality of communication channels contained within the baseband IF signal.
Abstract:
A multi-channel digital transceiver (400) receives uplink radio frequency signals and converts these signals to digital intermediate frequency signals. Digital signal processing, including a digital converter module (426), is employed to select digital intermediate frequency signals received at a plurality of antennas (412) and to convert these signals to baseband signals. The baseband signals are processed to recover a communication channel therefrom. Downlink baseband signals are also processed and digital signal processing within the digital converter module (426) up converts and modulates the downlink baseband signals to digital intermediate frequency signals. The digital intermediate frequency signals are converted to analog radio frequency signals, amplified and radiated from transmit antennas (420).
Abstract:
A method of reducing power consumption in a communication device includes a step of acquiring (204) a signal on a common pilot channel of a radio communication system. A next step includes detecting (206) predetermined bits in the signal on the common pilot channel indicating activity on paging channels of the radio communication system. When no paging channel activity is indicated in the second step, a last step includes powering down (208) portions of the electrical circuitry of the communication device so as to reduce power consumption, and when paging channel activity is indicated in the second step, a next step includes powering up (210) portions of the electrical circuitry of the communication device such that those paging channels indicating activity are monitored by the communication device.
Abstract:
In a hybrid matrix amplifier array (100), a configurable digital transform matrix (116) is initialize with a matrix of transform coefficients. A plurality of digital input signals (M1-M4) are received at inputs of the configurable digital transform matrix (116). The plurality of digital input signals are transformed to produce a plurality of transform digital signals (A1-A4) using the matrix of transform coefficients. The plurality of transform digital signals are converted to a plurality of transformed analoged signals (206) to produce a plurality of transformed analog signals. The transformed analog signals are amplified (104, 208) to produce amplified transformed signals. Finally, the amplified transformed signals are inverse transformed (102, 210) to produce output signals that correspond to a respective digital input signal (M1-M4). Upon sensing a failure in an amplifier array (104,126) a controller (128) recalls matrix transform coefficients from a memory (130) and write and reconfigures the digital transform matrix (116) to minimize the effects of the amplifier failure at the hybrid matrix amplifier outputs (132).
Abstract:
A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.
Abstract:
A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.