公开(公告)号：WO2006086512A8

公开(公告)日：2007-09-20

申请号：PCT/US2006004502

申请日：2006-02-08

Applicant: NANONEXUS INC

Inventor： BOTTOMS WILLIAM R ,  CHONG FU CHIUNG ,  MOK SAMMY ,  MODLIN DOUGLAS

IPC: G01R31/02

CPC classification number: G01R1/07378 ,  G01R1/0483 ,  G01R1/06716 ,  G01R1/07342 ,  G01R3/00

Abstract: An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

Abstract translation: 描述了改进的互连系统，例如用于电接触器和连接器，电子设备或模块封装组件，插座组件和/或探针卡组件系统。 示例性连接器包括第一连接器结构，其包括具有接触表面和接合表面的接触器基板以及从探针表面延伸的一个或多个导电微制造弹簧触头，第二连接器结构，其包括至少一个基板并具有 至少一个位于连接器表面上并且对应于该组弹簧触点的导电接触垫的装置，以及用于在至少第一位置和第二位置之间可移动地定位和对准第一连接器结构和第二连接器结构的装置， 使得在至少一个位置中，至少一个导电微制造弹簧接触件电连接到至少一个导电接触垫。

公开(公告)号：WO2004001807A3

公开(公告)日：2004-12-23

申请号：PCT/US0319963

申请日：2003-06-23

Applicant: NANONEXUS INC

Inventor： MOK SAMMY ,  CHONG FU-CHIUNG ,  SWIATOWIEC FRANK ,  LAHIRI SYAMAL KUMAR ,  HAEMER JOSEPH MICHAEL

IPC: G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H05K3/40 ,  H05K7/10 ,  G01R31/02

CPC classification number: G01R1/07378 ,  G01R1/06716 ,  G01R1/06727 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2889 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K3/4092 ,  H05K7/1061 ,  Y10S439/912

Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates. Alternate card assembly structures comprise a compliant carrier structure, such as a decal or screen, which is adhesively attached to the probe chip substrate.

Abstract translation: 公开了增强的集成电路探针卡和封装组件的几个实施例，其延伸了MEMS和薄膜制造的探针的机械顺应性，使得这些类型的弹簧探针结构可用于测试半导体上的一个或多个集成电路 晶圆。 公开了在商业晶片探测设备中提供紧密的信号垫间距顺应性和/或实现高水平并行测试的探针卡组件的几个实施例。 在一些优选实施例中，探针卡组件结构包括可分离的标准部件，这降低了组装制造成本和制造时间。 这些结构和组件能够以晶圆形式进行高速测试。 这些探头还内置了集成电路和MEMS或薄膜制造的弹簧尖端和基板上的探针布局结构的机械保护。 替代卡组合结构包括柔性载体结构，例如粘贴到探针芯片基底上的贴花或屏幕。

公开(公告)号：WO03081725B1

公开(公告)日：2004-03-25

申请号：PCT/US0308520

申请日：2003-03-18

Applicant: NANONEXUS INC

Inventor： LAHIRI SYAMAL KUMAR ,  SWIATOWIEC FRANK ,  CHONG FU-CHIUNG ,  MOK SAMMY ,  CHIEH ERH-KONG ,  MILTER ROMAN L ,  HAEMER JOSEPH M ,  LIN CHANG-MING ,  CHEN YI-HSENG ,  DOAN DAVID THANH

IPC: B81B3/00 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  H01L23/48 ,  H01R13/24 ,  H05K3/40 ,  H05K7/10 ,  H01R12/04 ,  H01R12/36

CPC classification number: B81B3/0072 ,  B81B2201/018 ,  G01R1/06711 ,  G01R1/06727 ,  G01R1/06761 ,  G01R1/07357 ,  G01R3/00 ,  H01L24/72 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01R12/718 ,  H01R13/24 ,  H05K3/4092 ,  H05K7/1061

Abstract: This invention provides a solution to increase the yield strength and fatigue strength of miniaturized springs (507), which can be fabricated in arrays with ultra-small pitches. It also discloses a solution to minimize adhesion of the contact pad materials to the spring tips upon repeated contacts without affecting the reliability of the miniaturized springs (507). In addition, the invention also presents a method to fabricate the springs (507) that allow passage of relatively higher current without significantly degrading their lifetime.

Abstract translation: 本发明提供了一种提高小型化弹簧（507）的屈服强度和疲劳强度的解决方案，其可以以超小间距阵列制造。 它还公开了一种解决方案，以便在重复接触时最小化接触垫材料对弹簧尖端的粘附，而不影响小型化弹簧（507）的可靠性。 此外，本发明还提供了一种制造弹簧（507）的方法，所述弹簧允许相对较高的电流通过而不会使其寿命显着降低。

公开(公告)号：WO0073905A3

公开(公告)日：2001-09-07

申请号：PCT/US0014768

申请日：2000-05-26

Applicant: NANONEXUS INC ,  CHONG FU CHIUNG ,  MOK SAMMY

Inventor： CHONG FU CHIUNG ,  MOK SAMMY

IPC: G01R31/26 ,  G01R1/06 ,  G01R1/073 ,  G01R31/28 ,  G11C29/56 ,  H01L21/66

CPC classification number: G01R31/2863 ,  G01R1/07378

Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.

Abstract translation: 公开了大量并行接口结构的几个实施例，其可以用于各种永久或临时应用中，例如用于互连集成电路（IC）以测试和烧录设备，用于互连电子设备内的模块，用于互连 计算机和其他外围设备，或用于互连其他电子电路。 大规模并行接口结构的优选实施例提供大规模并行集成电路测试组件。 大规模并行接口结构优选地使用一个或多个衬底来建立半导体晶片上的一个或多个集成电路与一个或多个测试模块之间的连接。 中间基板上的一层或多层优选地包括MEMS和/或薄膜制造的弹簧探针。 并联接口组件提供紧密的信号垫间距和柔顺性，并且优选地使用商业晶圆探测设备实现多个IC的并行测试或老化。 在一些优选实施例中，并行接口组件结构包括可分离的标准电连接器部件，这降低了组装制造成本和制造时间。 这些结构和组件能够以晶圆形式进行高速测试。

公开(公告)号：WO2005115068A8

公开(公告)日：2007-03-01

申请号：PCT/US2005017881

申请日：2005-05-20

Applicant: NANONEXUS INC ,  CHONG FU CHIUNG ,  KAO ANDREW S ,  MCKAY DOUGLAS ,  LITZA ANNA ,  MODLIN DOUGLAS ,  MOK SAMMY ,  PAREKH NITIN S ,  SWIATOWIEC FRANK JOHN ,  SHAN ZHAOHUI

Inventor： CHONG FU CHIUNG ,  KAO ANDREW S ,  MCKAY DOUGLAS ,  LITZA ANNA ,  MODLIN DOUGLAS ,  MOK SAMMY ,  PAREKH NITIN S ,  SWIATOWIEC FRANK JOHN ,  SHAN ZHAOHUI

IPC: H05K1/14 ,  G01R1/073 ,  G01R31/02 ,  G01R31/26 ,  G01R31/28 ,  H05K7/06

CPC classification number: G01R31/02 ,  G01R1/073 ,  G01R1/07378 ,  G01R31/2889 ,  Y10T29/49117 ,  Y10T29/49222

Abstract: An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) (62) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA (62) comprises a motherboard (32) parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface (94a), a reference plane (92) defined by at least three points located between the lower surface (94a) of the motherboard (32) and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane (92) with respect to the wafer. A probe chip (68) having a plurality of spring probes extending therefrom is mountable and demountable from the PCIA (62), without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Abstract translation: 描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。 示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）（62）。 所述PCIA（62）包括与所述半导体晶片平行的主板（32），所述主板具有上表面和相对的下平面安装表面（94a），由位于所述下表面（94a）之间的至少三个点限定的参考平面（92） ），主板（32）和晶片，位于主板安装表面下方的至少一个部件以及用于调节参考平面（92）相对于晶片的平面度的机构。 具有从其延伸的多个弹簧探针的探针芯片（68）可从PCIA（62）安装和拆卸，而不需要进一步的平面度调整。 互连结构和方法优选提供改进的制造周期。

公开(公告)号：WO2004001807B1

公开(公告)日：2005-02-03

申请号：PCT/US0319963

申请日：2003-06-23

Applicant: NANONEXUS INC

Inventor： MOK SAMMY ,  CHONG FU-CHIUNG ,  SWIATOWIEC FRANK ,  LAHIRI SYAMAL KUMAR ,  HAEMER JOSEPH MICHAEL

IPC: G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H05K3/40 ,  H05K7/10 ,  G01R31/02

CPC classification number: G01R1/07378 ,  G01R1/06716 ,  G01R1/06727 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2889 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K3/4092 ,  H05K7/1061 ,  Y10S439/912

Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates. Alternate card assembly structures comprise a compliant carrier structure, such as a decal or screen, which is adhesively attached to the probe chip substrate.

Abstract translation: 公开了增强的集成电路探针卡和封装组件的几个实施例，其延伸了MEMS和薄膜制造的探针的机械顺应性，使得这些类型的弹簧探针结构可用于测试半导体上的一个或多个集成电路 晶圆。 公开了在商业晶片探测设备中提供紧密的信号垫间距顺应性和/或实现高水平并行测试的探针卡组件的几个实施例。 在一些优选实施例中，探针卡组件结构包括可分离的标准部件，这降低了组装制造成本和制造时间。 这些结构和组件能够以晶圆形式进行高速测试。 这些探头还内置了集成电路和MEMS或薄膜制造的弹簧尖端和基板上的探针布局结构的机械保护。 替代卡组合结构包括柔性载体结构，例如粘贴到探针芯片基底上的贴花或屏幕。