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公开(公告)号：DE60232580D1
公开(公告)日：2009-07-23
申请号：DE60232580
申请日：2002-03-11
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED G
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公开(公告)号：CA2354623C
公开(公告)日：2008-10-07
申请号：CA2354623
申请日：1999-12-14
Applicant: QUALCOMM INC
Inventor： BUTTERFIELD DANIEL KEYES , YOUNIS SAED G
Abstract: An inventive high-resolution Delta-Sigma analog-to-digital converter (15) using a Continuous-Time implementation having suppressed sensitivity to clock jitter. The inventive method and apparatus suppresses the sensitivity to jitter by the square of the oversampling ratio when compared to current Continuous-Time implementations of Delta-Sigma modulators. The present invention preferably includes a digital-to-analog converter (17) that ensures that the integral of an output voltage is constant over a clock duty cycle regardless of clock jitter. The digital-to-analog converter (17) preferably includes at least two switches and a capacitor (28).
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公开(公告)号：AU2006203600B2
公开(公告)日：2008-05-29
申请号：AU2006203600
申请日：2006-08-21
Applicant: QUALCOMM INC
Inventor： WILBORN THOMAS , LIN JIAN , ZHANG HAITAO , SIMIC EMILIJA , KAUFMAN RALPH , YOUNIS SAED G , FILIPOVIC DANIEL
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
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公开(公告)号：DE69839192D1
公开(公告)日：2008-04-10
申请号：DE69839192
申请日：1998-12-08
Applicant: QUALCOMM INC
Inventor： BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C , YOUNIS SAED G , BUTTERFIELD DANIEL K
Abstract: A receiver comprising a sigma-delta analog-to-digital converter ( SIGMA DELTA ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling SIGMA DELTA receivers, the sampling frequency is less than twice the center frequency of the input signal into the SIGMA DELTA ADC. For Nyquist sampling SIGMA DELTA receivers, the sampling frequency is at least twice the highest frequency of the input signal into the SIGMA DELTA ADC. For baseband SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is approximately zero or DC. For bandpass SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the SIGMA DELTA ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The SIGMA DELTA ADC within the receiver provides many benefits.
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公开(公告)号：AU2006203601A1
公开(公告)日：2006-09-07
申请号：AU2006203601
申请日：2006-08-21
Applicant: QUALCOMM INC
Inventor： ZHANG HAITAO , SIMIC EMILIJA , LIN JIAN , FILIPOVIC DANIEL , WILBORN THOMAS , KAUFMAN RALPH , YOUNIS SAED G
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
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Patent Agency Ranking26.发明专利
公开(公告)号：AU2001259680B2
公开(公告)日：2005-12-22
申请号：AU2001259680
申请日：2001-05-08
Applicant: QUALCOMM INC
Inventor： PATRICK CHRISTOPHER , YOUNIS SAED G
Abstract: The frequency error of an oscillator is minimized by characterizing the operating environment of the oscillator. An electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source and a primary contributor to device temperature is the RF Power Amplifier (PA). The electronic device collects and stores the activity level of the PA. The effective PA duty cycle over a predetermined period of time is calculated. The LO operating environment is stabilized by operating the PA at the calculated duty cycle when the LO is required to operate in a high stability mode.
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公开(公告)号：BR0110683A
公开(公告)日：2004-02-10
申请号：BR0110683
申请日：2001-05-08
Applicant: QUALCOMM INC
Inventor： PATRICK CHRISTOPHER , YOUNIS SAED G
Abstract: The frequency error of an oscillator is minimized by characterizing the operating environment of the oscillator. An electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source and a primary contributor to device temperature is the RF Power Amplifier (PA). The electronic device collects and stores the activity level of the PA. The effective PA duty cycle over a predetermined period of time is calculated. The LO operating environment is stabilized by operating the PA at the calculated duty cycle when the LO is required to operate in a high stability mode.
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公开(公告)号：MXPA02011012A
公开(公告)日：2003-04-25
申请号：MXPA02011012
申请日：2001-05-08
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED G
IPC: G01S1/00 , G01S7/40 , G01S19/03 , G01S19/23 , H03J7/04 , H03L1/00 , H03L1/02 , H03L7/06 , H03L7/18 , H04B1/707 , H04L27/00
Abstract: El error de frecuencia de un oscilador se reduce al minimo mediante la caracterizacion del oscilador; se provee a un dispositivo electronico una senal de referencia de una fuente externa que contiene un error de frecuencia minimo; la senal externa se utiliza como una frecuencia de referencia para calcular el error de frecuencia de una fuente de frecuencia interna; el dispositivo electronico escudrina los parametros que son determinados para que tengan un efecto en la exactitud de la frecuencia de la fuente de frecuencia interna; la temperatura es un parametro que es conocido porque posee un efecto en la frecuencia de la fuente de frecuencia interna; el dispositivo electronico recopila y almacena los valores de los parametros al igual que la frecuencia de salida correspondiente o error de frecuencia de la fuente de frecuencia interna; la caracterizacion resultante de la fuente de frecuencia interna se utiliza para compensar la fuente de frecuencia interna cuando la senal de referencia externa no se suministra a la fuente de frecuencia interna.
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公开(公告)号：AU743320B2
公开(公告)日：2002-01-24
申请号：AU1633099
申请日：1998-12-08
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED G , BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C
Abstract: A programmable dynamic range receiver which provides the requisite level of performance at reduced power consumption. The SIGMA DELTA ADC within the receiver is designed with one or more loops. Each loop provides a predetermined dynamic range performance. The loops can be enabled or disabled based on the required dynamic range and a set of dynamic range thresholds. The SIGMA DELTA ADC is also designed with adjustable bias current. The dynamic range of the SIGMA DELTA ADC varies approximately proportional to the bias current. By adjusting the bias current, the required dynamic range can be provided by the SIGMA DELTA ADC with minimal power consumption. A reference voltage of the SIGMA DELTA ADC can be descreased when high dynamic range is not required, thereby allowing for less bias current in the SIGMA DELTA ADC and supporting circuitry. The dynamic range of the SIGMA DELTA ADC is a also function of the oversampling ratio which is proportional to the sampling frequency. High dynamic range requires a high oversampling ratio. When high dynamic range is not required, the sampling frequency can be lowered.
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公开(公告)号：CA2313139A1
公开(公告)日：1999-06-17
申请号：CA2313139
申请日：1998-12-08
Applicant: QUALCOMM INC
Inventor： BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C , YOUNIS SAED G , BUTTERFIELD DANIEL K
Abstract: A receiver comprising a sigma-delta analog-to-digital converter(.SIGMA..DELTA. ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling .SIGMA..DELTA. receivers, the sampling frequency is less than twice the center frequency of the input signal into the .SIGMA..DELTA. ADC. For Nyquist sampling .SIGMA..DELTA. receivers, the sampling frequency is at least twice the highest frequency of the input signal into the .SIGMA..DELTA. ADC. For baseband .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is approximately zero or DC. For bandpass .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the .SIGMA..DELTA. ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The .SIGMA..DELTA. ADC within the receiver provides many benefits.
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