公开(公告)号：US20160039665A1

公开(公告)日：2016-02-11

申请号：US14456476

申请日：2014-08-11

Applicant: Raytheon Company

Inventor： Adam M. Kennedy ,  Buu Q. Diep ,  Stephen H. Black ,  Tse E. Wong ,  Thomas Allan Kocian ,  Gregory D. Tracy

IPC: B81B7/00

CPC classification number: B81C1/00333 ,  B81B7/0048 ,  B81B7/0051 ,  B81B2201/0207 ,  B81C1/00825 ,  B81C2203/035

Abstract: A sealed package having a device disposed on a wafer structure and slid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

Abstract translation: 一种密封包装，其具有设置在晶片结构上的装置并且被结合到装置晶片上。 器件晶片包括：衬底; 设置在所述装置周围的基板的表面部分上的金属环和设置在所述金属环上的接合材料。 金属环横向延伸超过接合材料的内边缘和外边缘中的至少一个。 金属环的第一层包括具有比衬底的表面部分更高的延展性的应力消除缓冲层，并且具有大于接合材料的宽度的宽度。 金属环横向延伸超出接合材料的内边缘和外边缘中的至少一个。 应力消除缓冲层的热膨胀系数大于衬底表面部分的膨胀系数，小于接合材料的膨胀系数。

公开(公告)号：US20150279755A1

公开(公告)日：2015-10-01

申请号：US14736042

申请日：2015-06-10

Applicant: RAYTHEON COMPANY

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas A. Kocian

IPC: H01L23/10 ,  H01L23/26 ,  H01L21/52

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

公开(公告)号：US09093444B2

公开(公告)日：2015-07-28

申请号：US13939400

申请日：2013-07-11

Applicant: Raytheon Company

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas Allan Kocian

IPC: H01L23/48 ,  H01L23/544 ,  H01L23/02 ,  H01L23/06 ,  H01L23/498 ,  H01L21/768 ,  B81B7/00 ,  B81C1/00 ,  H01L23/26 ,  H01L27/146

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

Abstract translation: 电子装置及其制造方法。 一种或多种方法可以包括提供具有空腔和围绕空腔的表面的盖晶片和具有检测器装置和参考装置的装置晶片。 在某些实例中，可以将钛材料的阻焊层沉积到盖晶片的表面上。 可以进一步激活钛材料的阻焊层作为吸气剂。 在各种示例中，盖晶片和器件晶片可以使用焊料接合在一起，并且钛材料的阻焊层可以防止焊料接触盖晶片的表面。

公开(公告)号：US20150076216A1

公开(公告)日：2015-03-19

申请号：US14468660

申请日：2014-08-26

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Thomas A. Kocian ,  Roland W. Gooch

IPC: B23K1/20

CPC classification number: B23K1/206 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/20 ,  B23K1/203 ,  B23K3/047 ,  B23K3/08 ,  B23K2101/40 ,  H01L21/67092 ,  H01L21/67173 ,  H01L21/67207 ,  H01L24/27 ,  H01L24/29 ,  H01L24/742 ,  H01L24/75 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/27318 ,  H01L2224/27334 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/2781 ,  H01L2224/27826 ,  H01L2224/291 ,  H01L2224/29144 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/7501 ,  H01L2224/75102 ,  H01L2224/83013 ,  H01L2224/83201 ,  H01L2224/834 ,  H01L2224/83815 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2924/0105 ,  H01L2924/00

Abstract: In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.

Abstract translation: 在某些实施例中，系统包括沉积系统和等离子/粘合系统。 沉积系统从许多基底的衬底向外沉积焊料。 等离子体/粘合系统包括构造成等离子体清洁基板的等离子体系统和被配置为结合基板的接合系统。 等离子体/粘合系统至少减少了焊料的再氧化。 在某些实施例中，一种方法包括从衬底向外沉积焊料，从衬底去除金属氧化物，以及从衬底向外沉积覆盖层以至少减少焊料的再氧化。