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    MULTI-PITCH LEADS
    21.
    发明申请
    MULTI-PITCH LEADS 有权

    公开(公告)号：US20210375729A1

    公开(公告)日：2021-12-02

    申请号：US17404946

    申请日：2021-08-17

    Applicant: Texas Instruments Incorporated

    Inventor： Sreenivasan K. Koduri ,  Nazila Dadvand

    IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  C25D7/00 ,  H01L23/31

    Abstract: In some examples, a system comprises a die having multiple electrical connectors extending from a surface of the die and a lead coupled to the multiple electrical connectors. The lead comprises a first conductive member; a first non-solder metal plating stacked on the first conductive member; an electroplated layer stacked on the first non-solder metal plating; a second non-solder metal plating stacked on the electroplated layer; and a second conductive member stacked on the second non-solder metal plating, the second conductive member being thinner than the first conductive member. The system also comprises a molding to at least partially encapsulate the die and the lead.

    WAFER LEVEL BUMP STACK FOR CHIP SCALE PACKAGE
    22.
    发明申请
    WAFER LEVEL BUMP STACK FOR CHIP SCALE PACKAGE 有权

    公开(公告)号：US20210100108A1

    公开(公告)日：2021-04-01

    申请号：US16588220

    申请日：2019-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Sreenivasan K. Koduri

    IPC: H05K3/34 ,  H05K1/02 ,  H05K3/28 ,  H05K3/38

    Abstract: A microelectronic device includes a die less than 300 microns thick, and an interface tile. Die attach leads on the interface tile are electrically coupled to die terminals on the die through interface bonds. The microelectronic device includes an interposer between the die and the interface tile. Lateral perimeters of the die, the interposer, and the interface tile are aligned with each other. The microelectronic device may be formed by forming the interface bonds and an interposer layer, while the die is part of a wafer and the interface tile is part of an interface lamina. Kerfs are formed through the interface lamina, through the interposer, and partway through the wafer, around a lateral perimeter of the die. Material is subsequently removed at a back surface of the die to the kerfs, so that a thickness of the die is less than 300 microns.

    INTEGRATED CAPACITOR WITH EXTENDED HEAD BUMP BOND PILLAR
    23.
    发明申请
    INTEGRATED CAPACITOR WITH EXTENDED HEAD BUMP BOND PILLAR 有权

    公开(公告)号：US20210098348A1

    公开(公告)日：2021-04-01

    申请号：US16588138

    申请日：2019-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Sreenivasan K. Koduri

    IPC: H01L23/495 ,  H01L23/00 ,  H01L49/02 ,  H01L21/288 ,  H01L21/56 ,  H01L21/48

    Abstract: A microelectronic device has a die with a first electrically conductive pillar, and a second electrically conductive pillar, mechanically coupled to the die. The microelectronic device includes a first electrically conductive extended head electrically coupled to the first pillar, and a second electrically conductive extended head electrically coupled to the second pillar. The first pillar and the second pillar have equal compositions of electrically conductive material, as a result of being formed concurrently. Similarly, the first extended head and the second extended head have equal compositions of electrically conductive material, as a result of being formed concurrently. The first extended head provides a bump pad, and the second extended head provides at least a portion of a first plate of an integrated capacitor. A second plate may be located in the die, between the first plate and the die, or on an opposite of the first plate from the die.

    PACKAGED DEVICE WITH DIE WRAPPED BY A SUBSTRATE
    24.
    发明申请
    PACKAGED DEVICE WITH DIE WRAPPED BY A SUBSTRATE 有权

    公开(公告)号：US20210013116A1

    公开(公告)日：2021-01-14

    申请号：US16506526

    申请日：2019-07-09

    Applicant: Texas Instruments Incorporated

    Inventor： Sreenivasan K. Koduri

    IPC: H01L23/31 ,  H01L23/00 ,  H01L23/48 ,  B81C1/00 ,  B81B3/00 ,  B81B7/00

    Abstract: A die-wrapped packaged device includes at least one flexible substrate having a top side and a bottom side that has lead terminals, where the top side has outer positioned die bonding features coupled by traces to through-vias that couple through a thickness of the flexible substrate to the lead terminals. At least one die includes a substrate having a back side and a topside semiconductor surface including circuitry thereon having nodes coupled to bond pads. One of the sides of the die is mounted on the top side of the flexible circuit, and the flexible substrate has a sufficient length relative to the die so that the flexible substrate wraps to extend over at least two sidewalls of the die onto the top side of the flexible substrate so that the die bonding features contact the bond pads.

    EXPANDED HEAD PILLAR FOR BUMP BONDS
    25.
    发明申请
    EXPANDED HEAD PILLAR FOR BUMP BONDS 审中-公开

    公开(公告)号：US20200258856A1

    公开(公告)日：2020-08-13

    申请号：US16861181

    申请日：2020-04-28

    Applicant: Texas Instruments Incorporated

    Inventor： Sreenivasan K. Koduri

    IPC: H01L23/00

    Abstract: A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.

    Multi-lead adapter
    30.
    发明授权
    Multi-lead adapter 有权

    公开(公告)号：US11830793B2

    公开(公告)日：2023-11-28

    申请号：US17528087

    申请日：2021-11-16

    Applicant: Texas Instruments Incorporated

    Inventor： Sreenivasan K. Koduri ,  Abram M. Castro

    IPC: H01L23/495 ,  H01L23/50

    CPC classification number: H01L23/49541 ,  H01L23/50 ,  H01L2224/48247

    Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.

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