公开(公告)号：JP2008017335A

公开(公告)日：2008-01-24

申请号：JP2006188373

申请日：2006-07-07

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： TSUJI NOBUAKI ,  KISHII TATSUYA

IPC: H03G1/04

Abstract: PROBLEM TO BE SOLVED: To provide a class D amplifier capable of effectively preventing production of pop noise.
SOLUTION: The class D amplifier configured to output a pulse signal subjected to pulse width modulation by outputting a signal with a prescribed level from one of output terminals (T21, T22) in response to a signal level of an analog input signal (AIN) and comparing the signal level with a triangle wave signal from the other output terminal and generated by a prescribed clock signal (ϕ), is provided with an output control section 2000 that controls a signal outputted from the output terminal in a timing synchronously with the clock signal (ϕ) to the prescribed level when receiving a mute signal (MUTE_N) is received.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供能够有效地防止弹奏噪声的产生的D类放大器。 解决方案：D类放大器，被配置为通过响应于模拟输入信号的信号电平（T21，T22）从输出端（T21，T22）之一输出具有规定电平的信号来输出经受脉冲宽度调制的脉冲信号（ AIN），并且将来自另一输出端子的信号电平与由规定的时钟信号（φ）产生的三角波信号进行比较，具有输出控制部2000，该输出控制部2000控制从与输出端子同步的定时输出的信号 接收到静音信号（MUTE_N）时的时钟信号（φ）达到规定的电平。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2005033541A

公开(公告)日：2005-02-03

申请号：JP2003196563

申请日：2003-07-14

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： KISHII TATSUYA

IPC: H03F3/34 ,  H03F3/45 ,  H03G3/02 ,  H03G3/12

CPC classification number: H03F3/45183 ,  H03F3/45188 ,  H03F3/45753 ,  H03F3/45977 ,  H03F2203/45686

Abstract: PROBLEM TO BE SOLVED: To provide an offset correction circuit capable of reducing offset of an amplification circuit conveniently with high precision, and to provide an electronic volume.
SOLUTION: An offset discrimination circuit 10 constituting an offset correction circuit for correcting offset of an amplification circuit corrects offset of the amplification circuit when power is turned on.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供能够以高精度方便地降低放大电路的偏移并提供电子体积的偏移校正电路。 解决方案：构成用于校正放大电路的偏移的偏移校正电路的偏移识别电路10在接通电源时校正放大电路的偏移。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004032091A

公开(公告)日：2004-01-29

申请号：JP2002181768

申请日：2002-06-21

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： KISHII TATSUYA

IPC: H03G3/12

Abstract: PROBLEM TO BE SOLVED: To prevent noise generation even when volume data are consecutively input.
SOLUTION: A zero-crossing detection means for detecting the zero crossing of an input audio signal, memory means (130, 132) for storing volume setting data for setting volume, control means (138, 140, 142, 144 and 146) for outputting volume data for adjusting the volume of the input audio signal corresponding to the volume setting data stored in the memory means, are provided. The control means receives the detection outputted from the zero-crossing detection means. When new volume setting data are inputted into the memory means within a waiting time before the zero crossing detection of the input audio signal, the control means reads out the volume setting data inputted and stored into the memory means immediately before the input of the new volume setting data, and outputs the volume setting data as volume data.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JPH04111521A

公开(公告)日：1992-04-13

申请号：JP22918090

申请日：1990-08-30

Applicant: YAMAHA CORP

Inventor： KADAKA TAKAYUKI ,  MOTOME MITSUHIRO ,  HIRANO MASAZO ,  HOSHI JURO ,  KISHII TATSUYA ,  MORITA KUNIAKI

IPC: H03M1/10 ,  H03K5/00

Abstract: PURPOSE:To obtain a pulse output of less noise from an output element by interposing a second transistor TR, which is turned on in accordance with a synchronizing pulse narrower than a data pulse, between an output terminal and a first TR turned on in accordance with the data pulse. CONSTITUTION:A first TR T1 turned on in accordance with the data pulse and a second TR T2 turned on in accordance with the synchronizing pulse narrower than the data pulse are connected in series, and the output terminal is connected to the side of the second TR T3 of this series connection line, and the pulse output of small noise synchronized with the turning-on timing of the second TR T3 is taken out from the output terminal on condition that first and second TRs T2 and T3 are turned on together. That is, the noise accompanied with the level change of the data pulse is stopped by the second TR T3 and does not reach the output, terminal because the second TR T3 is interposed in the turning-off state between the first TR. T1 and the output terminal. Thus, a pulse output Q of less noise is obtained from the output terminal.

公开(公告)号：JP2011067039A

公开(公告)日：2011-03-31

申请号：JP2009216728

申请日：2009-09-18

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： MIYAZAKI MASAHITO ,  KAWAI HIROKATA ,  KISHII TATSUYA ,  NAKAMURA KATSUYOSHI ,  MAKINO KEN

IPC: H02M3/07 ,  H03F3/21 ,  H03K17/06

Abstract: PROBLEM TO BE SOLVED: To provide a charge pump for accurately outputting a voltage of a desired voltage value, without requiring speedily operating comparators. SOLUTION: The charge pump 1 includes a switch circuit 20 interposed among output capacitors C1, C2, a flying capacitor C3, and input power supplies HPVDD, SPVDD; and a control section 10. The control section 10 allows the input power supplies to charge the flying capacitor C3 via the switching circuit 20, and to make a voltage distribute to the output capacitor C2 from the flying capacitor C3. The control section 10 includes a charge control means which gradually increases the conductance or the output current value of a P-channel transistor P5, when the input power supply SPVDD charges the flying capacitor C3, detects that a charge voltage CP of the flying capacitor C3 which exceeds a reference voltage VLMT imparted in advance, and then turns off the transistor. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于精确地输出所需电压值的电荷的电荷泵，而不需要快速操作的比较器。 解决方案：电荷泵1包括插在输出电容器C1，C2，飞行电容器C3和输入电源HPVDD，SPVDD之间的开关电路20; 和控制部分10.控制部分10允许输入电源经由开关电路20对飞跨电容器C3充电，并且使得从飞行电容器C3向输出电容器C2分配电压。 控制部分10包括充电控制装置，当输入电源SPVDD对飞跨电容器C3充电时，逐渐增加P沟道晶体管P5的电导或输出电流值，检测到飞行电容器C3的充电电压CP 其超过预先赋予的参考电压VLMT，然后关断晶体管。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2011066558A

公开(公告)日：2011-03-31

申请号：JP2009213806

申请日：2009-09-15

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： KISHII TATSUYA ,  IYODA MORITAKA ,  TSUCHIYA HIROTOSHI ,  MAEJIMA TOSHIO ,  NAKAMURA KATSUYOSHI ,  MIYAZAKI MASAHITO ,  HIMENO AKIHISA

IPC: H03F3/217 ,  H03F1/00

CPC classification number: H03F3/217

Abstract: PROBLEM TO BE SOLVED: To achieve a mute function of a class-D amplifier without making a circuit large in scale nor complicated. SOLUTION: An output limit instruction generating section 310 detects that output digital signals VOp and VOn are clipped, and outputs an output limit instruction signal Cdet. An attenuation instruction pulse generating section 320 includes a capacitor C30 for integrating the output limit instruction signal Cdet, and outputs a periodical attenuation instruction pulse SW having pulse width corresponding to a voltage VC1 of the capacitor C30. An attenuator 160 is provided in an input path for input signals VIp and VIn to the class-D amplifier, and turns on by being supplied with the attenuation instruction pulse SW to attenuate the input signals. A mute control section 330 controls the voltage VC1 of the capacitor C30 independently of the output limit instruction signal Cdet to control an amount of the attenuation applied by the attenuator 160 applied to the input signal. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：为了实现D类放大器的静音功能，而不会使电路规模大，也不复杂。 解决方案：输出限制指令生成部分310检测输出数字信号VOp和VOn被剪切，并输出输出限制指令信号Cdet。 衰减指令脉冲发生部分320包括用于积分输出限制指令信号Cdet的电容器C30，并且输出具有与电容器C30的电压VC1相对应的脉冲宽度的周期性衰减指令脉冲SW。 衰减器160设置在D类放大器的输入信号VIp和VIn的输入路径中，并通过提供衰减指令脉冲SW来导通，以衰减输入信号。 静音控制部分330独立于输出限制指令信号Cdet控制电容器C30的电压VC1，以控制施加到输入信号的衰减器160施加的衰减量。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2011061494A

公开(公告)日：2011-03-24

申请号：JP2009208965

申请日：2009-09-10

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： KISHII TATSUYA ,  MIYAZAKI MASAHITO ,  HIMENO AKIHISA

IPC: H03K5/08 ,  H03F3/45

Abstract: PROBLEM TO BE SOLVED: To provide a technology for effectively suppressing an in-phase component of a differential signal.
SOLUTION: A differential signal SIN is supplied to an input terminal 321 and an input terminal 322 of a signal processing circuit 30. A differential amplifier 42 includes a non-inverted input terminal PIN1, an inverted input terminal PIN2, an inverted output terminal POUT1, and a non-inverted output terminal POUT2. Resistors R1 to R4 are connected to the differential amplifier 42. A control circuit 46 controls a resistance value of at least one of the resistors R1 to R4, in response to a potential of at least one of the inverted output terminal POUT1 and the non-inverted output terminal POUT2, in such a way that a resistance ratio R2/R1 of the resistors R1 and R2 comes closer to a resistance ratio R4/R3 of the resistors R3 and R4. An in-phase setting section 44 sets the input terminal 321 and the input terminal 322 to the equal potential when operating the control circuit 46.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于有效地抑制差分信号的同相分量的技术。 解决方案：差分信号SIN被提供给信号处理电路30的输入端子321和输入端子32.差分放大器42包括非反相输入端子PIN1，反相输入端子PIN2，反相输出端 端子POUT1和非反相输出端子POUT2。 电阻器R1至R4连接到差分放大器42.控制电路46响应于反相输出端POUT1和非反相输出端POUT1中的至少一个的电位来控制电阻器R1至R4中的至少一个的电阻值， 反相输出端子POUT2，使得电阻器R1和R2的电阻比R2 / R1接近电阻器R3和R4的电阻比R4 / R3。 同步设置部分44在操作控制电路46时将输入端子321和输入端子322设置为相等的电位。版权所有：（C）2011，JPO＆INPIT

公开(公告)号：JP2009094584A

公开(公告)日：2009-04-30

申请号：JP2007260405

申请日：2007-10-03

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： TSUCHIYA HIROTOSHI ,  YAEZAWA SHINJI ,  HASHIMOTO YUYA ,  NAKAMORI TORU ,  KISHII TATSUYA

IPC: H03K4/06

Abstract: PROBLEM TO BE SOLVED: To provide a triangular wave generation circuit that is less affected by variations in a supply voltage and has small variations in the center level of triangular wave signals when the supply voltage varies. SOLUTION: The triangular wave generation circuit comprises: a capacitor; a constant current source 11 for charging by supplying a constant current to the capacitor; a constant current source 14 for discharging the charged electrical charge of the capacitor; a switch 12 connected between the constant current source 11 and the capacitor; and a switch 13 connected between the constant current source 14 and the capacitor. The triangular wave generation circuit outputs the terminal voltage of the capacitor as a triangular wave signal by turning on/of the switches 12, 13 alternately at a constant period. The triangular wave generation circuit has a reference voltage generation circuit that is connected to the output end of the triangular wave signal and supplies a reference voltage where the influence of variations of the supply voltage that becomes the center voltage of the triangular wave is small. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种受电源电压变化影响较小的三角波产生电路，并且当电源电压变化时三角波信号的中心电平变化很小。 解决方案：三角波产生电路包括：电容器; 用于通过向电容器提供恒定电流来进行充电的恒流源11; 用于对电容器的充电电荷进行放电的恒流源14; 连接在恒流源11和电容器之间的开关12; 连接在恒流源14和电容器之间的开关13。 三角波产生电路通过以恒定周期交替地接通/开关12,13将电容器的端子电压作为三角波信号输出。 三角波产生电路具有连接到三角波信号的输出端的参考电压产生电路，并提供作为三角波的中心电压的电源电压的变化的影响小的参考电压。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2009094567A

公开(公告)日：2009-04-30

申请号：JP2007260262

申请日：2007-10-03

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： TSUCHIYA HIROTOSHI ,  YAEZAWA SHINJI ,  HASHIMOTO YUYA ,  NAKAMORI TORU ,  KISHII TATSUYA

IPC: H03K4/06

Abstract: PROBLEM TO BE SOLVED: To provide a triangular wave synchronization generation circuit capable of generating an identical wave-height value by synchronizing spectrum-spread triangular waves between a master and a slave. SOLUTION: The triangular wave synchronization generation system comprises: a triangular wave generation section that has the same wave-height value and generates triangular waves having different periods in time series in a set order; a synchronization pulse generation section for generating triangular wave reference pulses of periods of triangular waves; a duty control section for outputting with a triangular wave reference reproduction pulse by allowing the pulse width of the triangular wave reference pulse set to a reference period to differ from that of other periods in the plurality of periods of the triangular wave reference pulses; a reference pulse reproduction section for reproducing the triangular wave reference pulses from the triangular wave reference reproduction pulses; a reference period detection section for detecting the triangular wave reference pulse of a reference period according to a difference in the pulse width from the triangular wave reference reproduction pulse; and a triangular wave reproduction section for reproducing triangular waves having a period corresponding to the triangular wave reference pulses with the triangular wave reference pulse having a reference period as a reference. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种能够通过在主机和从机之间同步频谱扩展的三角波来产生相同的波高值的三角波同步产生电路。 解决方案：三角波同步产生系统包括：具有相同波高值的三角波产生部分，并且按照设定的顺序产生具有时间序列不同周期的三角波; 用于产生三角波周期的三角波参考脉冲的同步脉冲产生部分; 一个占空比控制部分，通过允许三角波参考脉冲的脉冲宽度设定在一个参考周期，与三角波参考脉冲的多个周期中的其他周期不同; 参考脉冲再现部分，用于从三角波参考再现脉冲再现三角波参考脉冲; 参考周期检测部分，用于根据来自三角波参考再现脉冲的脉冲宽度的差异来检测参考周期的三角波参考脉冲; 以及三角波再现部分，用于再现具有对应于具有参考周期的三角波参考脉冲的三角波参考脉冲的周期的三角波作为参考。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2004023302A

公开(公告)日：2004-01-22

申请号：JP2002173314

申请日：2002-06-13

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： KISHII TATSUYA

IPC: H03G3/02 ,  H03G5/10

Abstract: PROBLEM TO BE SOLVED: To provide a test method for bringing efficiency to a test of an electronic volume at its shipment.
SOLUTION: In testing whether or not all the taps of variable resistors 11, 12 of an analog circuit 9 are normal, a DC signal with a prescribed voltage is received from a terminal Vin, and a voltage Vout is observed while the taps are sequentially switched by using volume setting data. A built-in analog test circuit 20 performs the processing above and outputs a result of whether or not the voltage Vout is decreased (increased) before and after the input of the volume setting data as a binary H/L voltage. Thus, it is not required for an external device to directly measure the voltage Vout and the test can efficiently be performed.
COPYRIGHT: (C)2004,JPO