公开(公告)号：EP1813001A1

公开(公告)日：2007-08-01

申请号：EP05812154.2

申请日：2005-10-17

Applicant: FCI

Inventor： MINICH, Steven

IPC: H01R29/00

CPC classification number: H05K1/144 ,  H01R12/585 ,  H05K3/308 ,  H05K2201/044 ,  H05K2201/096 ,  H05K2201/10189 ,  H05K2201/1059

Abstract: A mid-plane is disclosed. The mid-plane includes a first printed circuit board having a plurality of plated vias adapted to receive tails attached to a first connector and having a plurality of unplated clearance holes adapted to receive tails attached to a second connector. The second printed circuit board has a plurality of plated vias adapted to receive tails attached to the second connector and has a plurality of unplated clearance adapted to receive tails attached to the first connector.

Abstract translation: 披露了一架中型飞机。 中平面包括第一印刷电路板，该第一印刷电路板具有适于接收附接到第一连接器的尾部的多个电镀通孔并且具有适于接收附接到第二连接器的尾部的多个未电镀间隙孔。 第二印刷电路板具有适于接收附接到第二连接器的尾部的多个电镀通孔并且具有适于接收附接到第一连接器的尾部的多个未电镀间隙。

公开(公告)号：EP1458225B1

公开(公告)日：2007-02-14

申请号：EP03028597.7

申请日：2003-12-11

Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

Inventor： Murata, Yuichiro ,  Nakagawa, Naoki

IPC: H05K1/14

CPC classification number: H05K1/14 ,  H05K1/023 ,  H05K1/167 ,  H05K2201/044 ,  H05K2201/10022

公开(公告)号：EP1619757A1

公开(公告)日：2006-01-25

申请号：EP04700110.2

申请日：2004-01-05

Applicant: Huawei Technologies Co., Ltd.

Inventor： LI, Zhenya Huawei Administration Building ,  WEI, Konggang Huawei Administration Building ,  LI, Wenjian Huawei Administration Building ,  WU, Guzheng Huawei Administration Building ,  WANG, Chenglong Huawei Administration Building ,  YANG, Zhiguo Huawei Administration Building ,  JIN, Junwen Huawei Administration Building

IPC: H01R9/28 ,  H01R12/04 ,  H01R12/32

CPC classification number: H01R12/52 ,  H01R31/06 ,  H05K1/18 ,  H05K2201/044 ,  H05K2201/097 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: The invention discloses a double-sided pluggable backplane, having one side on which one or more than one front backplane connector is disposed according to width of plot positions and the other side on which one or more than one rear backplane connector is disposed according to width of plot positions, the front backplane connector and the adjacent rear backplane connector being located at the same horizontal level on the double-sided pluggable backplane and staggered right-and-left in turn, meanwhile the front backplane connector and the rear backplane connector having uniform specifications and the same contact pin definitions. The double-sided pluggable backplane according to the present invention can realize interchangeability of front boards and rear boards and have no special requirements for design and manufacture of printed circuit boards and machining of the backplane, which decreases cost of production and difficulty on processing. At the same time, interchangeability of front boards and rear boards reduces design cost of boards.

Abstract translation: 本发明公开了一种双面可插拔背板，其一侧根据图形位置的宽度设置有一个或多于一个的前背板连接器，另一侧根据宽度设置有一个或多个后背板连接器 的前置背板连接器和相邻的后背板连接器依次位于双面可插拔背板上的相同水平位置，并且依次交错排列，同时前背板连接器和后背板连接器具有均匀的 规格和相同的接头针定义。 根据本发明的双面可插拔背板可以实现前板和后板的可互换性，对印刷电路板的设计和制造以及背板加工没有特殊要求，这降低了生产成本和加工难度。 同时，前板和后板的可互换性降低了板的设计成本。

公开(公告)号：EP1544948A2

公开(公告)日：2005-06-22

申请号：EP04029720.2

申请日：2004-12-15

Applicant: Palo Alto Research Center Incorporated

Inventor： Vanschuylenbergh, Koenraad F. ,  Volkel, Armin R. ,  Distefano, Thomas H. ,  Rosa, Michel A. ,  Fork, David K. ,  Chow, Eugene M. ,  Lean, Meng H.

IPC: H01R12/04

CPC classification number: H01R12/78 ,  H05K1/147 ,  H05K3/323 ,  H05K3/361 ,  H05K3/365 ,  H05K2201/044 ,  H05K2201/09845

Abstract: A data transmission interconnect assembly (e.g., a router) capable of transmission speeds in excess of 40Gbps in which a line-card is detachably coupled to a backplane using flexible flat cables that are bent to provide a continuous, smooth curve between the connected boards, and connected by a connection apparatus that employs cable-to-cable interface members that are transparent to the transmitted signal waves. Microspring contact structures are formed on the cables, or on a contact structure pressed against the cables, to provide interface arrangements that are smaller than a wavelength of the transmitted signal. A connector apparatus uses a cam mechanism to align the cables, and then to press a contact structure, having micro spring interface members formed thereon, against the cables. An alterative contact structure uses anisotropic conductive film.

Abstract translation: 能够传输速度超过40Gbps的数据传输互连组件（例如，路由器），其中线卡可以使用弯曲以在连接的板之间提供连续的平滑曲线的柔性扁平电缆可拆卸地耦合到背板， 并且通过使用对所发送的信号波透明的电缆到电缆接口部件的连接装置连接。 微电缆接触结构形成在电缆上或者压在电缆上的接触结构上，以提供比传输信号的波长小的接口布置。 连接器装置使用凸轮机构来对准电缆，然后将形成有微弹簧接口部件的接触结构按压在电缆上。 替代接触结构使用各向异性导电膜。

公开(公告)号：EP1029431B1

公开(公告)日：2005-02-02

申请号：EP98943307.3

申请日：1998-08-20

Applicant: INTEL CORPORATION

Inventor： LEDDIGE, Michael ,  SPRIETSMA, John

IPC: H05K1/02 ,  H05K7/02

CPC classification number: H05K1/116 ,  H05K1/0219 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09381 ,  H05K2201/09727

Abstract: A connector (400) for coupling high frequency signals between devices includes a substrate having an array of vias (410) for coupling a reference voltage to reference voltages traces (460) that extend along the substrate surface between the devices. Signal traces (430) including device pads (434) for coupling signals to and from the devices alternate with the reference voltage traces (460). The widths of the reference voltage traces (460) are varied to maintain a substantially constant separation between the reference voltage trace (460) and an adjacent signal trace (430).

公开(公告)号：EP1458225A2

公开(公告)日：2004-09-15

申请号：EP03028597.7

申请日：2003-12-11

Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

Inventor： Murata, Yuichiro ,  Nakagawa, Naoki

IPC: H05K1/14

CPC classification number: H05K1/14 ,  H05K1/023 ,  H05K1/167 ,  H05K2201/044 ,  H05K2201/10022

Abstract: A multi-pin connector (3) arranged to connect a signal line on a backboard (1) side and a signal line on a daughter board (2) side has open pins (4 to 9) where the signal lines are not connected. In order to prevent transmission losses of the signal lines caused by these open pins (4 to 9), terminating resistances (10) are connected to both ends of the open pins (4 to 9), and the sides of the terminating resistances (10) opposite to the open pins (4 to 9) are connected to the ground or a power supply.

Abstract translation: 用于连接背板（1）侧的信号线和子板（2）侧的信号线的多针连接器（3）具有未连接信号线的开放引脚（4〜9）。 为了防止由这些开放引脚（4至9）引起的信号线的传输损耗，端接电阻（10）连接到开放引脚（4至9）的两端，并且端接电阻（10 ）与开放引脚（4至9）相对，连接到地或电源。

公开(公告)号：EP1232540A1

公开(公告)日：2002-08-21

申请号：EP99962856.3

申请日：1999-11-24

Applicant: TERADYNE, INC.

Inventor： COHEN, Thomas, S. ,  GAILUS, Mark, W. ,  STOKOE, Philip, T.

IPC: H01R12/16 ,  H01R12/18 ,  H01R24/00

CPC classification number: H01R12/724 ,  H01R12/727 ,  H01R13/6471 ,  H01R13/6473 ,  H01R13/6587 ,  H01R24/44 ,  H05K1/0237 ,  H05K1/115 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09718 ,  H05K2201/10189

Abstract: An electrical connector for transferring a plurality of differential signals between electrical components (14, 16). The connector is made of modules (18) that have a plurality of pairs (104) of signal conductors (102) with a first signal path and a second signal path. Each signal path has a pair of contact sections (116) extending between the contact portions. For each pair of signal conductors, a first distance between the interim sections is less than a second distance between the pair of signal conductors and any other pair of signal conductors of the plurality. Embodiments are shown that increase routability.

公开(公告)号：EP1029431A4

公开(公告)日：2002-07-24

申请号：EP98943307

申请日：1998-08-20

Applicant: INTEL CORP

Inventor： LEDDIGE MICHAEL ,  SPRIETSMA JOHN

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/42 ,  H05K7/02

CPC classification number: H05K1/116 ,  H05K1/0219 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09381 ,  H05K2201/09727

Abstract: A connector (400) for coupling high frequency signals between devices includes a substrate having an array of vias (410) for coupling a reference voltage to reference voltages traces (460) that extend along the substrate surface between the devices. Signal traces (430) including device pads (434) for coupling signals to and from the devices alternate with the reference voltage traces (460). The widths of the reference voltage traces (460) are varied to maintain a substantially constant separation between the reference voltage trace (460) and an adjacent signal trace (430).

Abstract translation: 用于在器件之间耦合高频信号的连接器（400）包括具有用于将参考电压耦合到在器件之间沿着衬底表面延伸的参考电压迹线（460）的衬底阵列的衬底（410）。 包括用于耦合去往和来自装置的信号的装置垫（434）的信号迹线（430）与参考电压迹线（460）交替。 参考电压迹线（460）的宽度被改变以维持参考电压迹线（460）与相邻信号迹线（430）之间的基本上恒定的间隔。

公开(公告)号：EP1064699A1

公开(公告)日：2001-01-03

申请号：EP98948454.8

申请日：1998-09-22

Applicant: RAMBUS INC.

Inventor： PERINO, Donald, V. ,  GARRETT, Billy, Wayne, Jr. ,  LIAW, Haw-Jyh ,  NGUYEN, David ,  NIMMAGADDA, Srinivas ,  GASBARRO, James, A. ,  DeWITT CRISP, Richard

IPC: H01R12/04 ,  G06F13/40 ,  H05K7/14

CPC classification number: G11C5/063 ,  G06F13/1684 ,  G06F13/4086 ,  G06F13/409 ,  G06F13/4247 ,  G11C5/04 ,  G11C7/1048 ,  H05K1/023 ,  H05K1/0246 ,  H05K1/0248 ,  H05K1/14 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09263 ,  H05K2201/10022 ,  H05K2201/10159 ,  H05K2201/10689

Abstract: A high frequency bus system (450) which insures uniform arrival times of high fidelity signals to the devices (510), despite the use of the bus (450) on modules (420) and connectors. The high frequency bus system (450) includes a first bus segment having one or more devices (510) connected between a first and second end. The high frequency bus system (450) also includes a second bus segment which has no devices connected to it. The first end of the first segment and the second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at substantially the same time, they arrive at each device (510) connected to the first bus segment at substantially the same time. Conversely when two signals originate at a device (510) substantially at the same time, they arrive at the first end of the second bus segment at substantially the same time. Uniform arrival times hold despite the use of connectors to couple the segments together, despite the segments being located on modules, without the need for stubs, despite the presence of routing turns in the segments and despite the type of information, such as address, data, or control, carried by the signals.

公开(公告)号：EP0852457A3

公开(公告)日：1999-04-28

申请号：EP97123001.6

申请日：1997-12-30

Applicant: AT&T Corp.

Inventor： Gates, Frank Vernon

IPC: H05K7/20 ,  G06F1/20

CPC classification number: H05K7/2049 ,  G06F1/20 ,  H01L2924/0002 ,  H05K1/141 ,  H05K1/189 ,  H05K3/0058 ,  H05K2201/042 ,  H05K2201/044 ,  H05K2201/2009 ,  H01L2924/00

Abstract: An apparatus and method are provided for removing heat generated by the operation of electronic devices to allow for a more densely packed arrangement of the electronic devices on a parent board. The apparatus comprises a metallic housing that encloses a flexible backplane with a pair of rigid supports mounted on its bottom surface and at least one electrical device connected to the top surface of the backplane that is supported by the rigid supports. The flexible backplane is folded and positioned within the housing such that the rigid supports face inwardly with respect to the housing and the electronic devices face outwardly with respect to the housing. A biasing member is positioned between the rigid supports for biasing the electronic devices against the housing. The flexible backplane is a flexible circuit board that supports a PC card array and the loading device is a cylindrical elastomeric compressor. The metallic housing is an aluminum U-shaped structure, having a pair of parallel walls extending transversely from a shorter wall. An optional cover can be attached to the open end of the U- shaped housing to protect the inner structure. The outer surfaces of the parallel walls of a U- shaped housing are ribbed to provide a plurality of cooling fins for additional transfer of heat from the electronic devices to ambient air. The inner surfaces of the parallel walls comprise vertically extending grooves to guide the PC cards into position within the housing. Elastomeric conductive films are adhered to the inner surface of the housing within the grooves to better facilitate heat transfer to the cooling fins.