公开(公告)号：KR1019960012179A

公开(公告)日：1996-04-20

申请号：KR1019950021251

申请日：1995-07-15

Applicant: 마이크론 테크놀로지, 인코포레이티드

Inventor： 데이비드에이캐디2세 ,  죤리

IPC: H01J1/30

CPC classification number: H01J9/025 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: 개선된접합누설특성을갖는전계방출디스플레이(FED)를제조하는방법이제공된다. 상기방법은 FED의베이스플레이트상에형성된반도체접합및 FED의캐소드루미네슨트디스플레이스크린간에광차단소자를형성하는것을포함한다. 광차단소자는환경에서발생된광 및디스플레이스크린에서형성된광으로부터접합이파괴되는것을보호한다. 따라서접합의전기특성은일정하게되고접합누설은개선된다. 광차단소자는불투명한광 흡수또는광반사층으로서형성될수 있다. 게다가, 광차단소자는베이스플레이트의소정에리어를보호하도록패턴닝되어상호접속층과같은다수회로기능을제공할수 있다.

Abstract translation: 提供了一种制造具有改善的结泄漏特性的场致发射显示器（FED）的方法。 该方法包括在形成于FED的基板上的半导体结与FED的阴极发光显示屏之间形成遮光元件。 遮光元件保护结免于环境中产生的光和显示屏上形成的光的破坏。 因此，接点的电特性变得恒定并且接点泄漏改善。 遮光元件可以形成为不透光的光吸收层或光反射层。 另外，遮光元件可以被图案化以保护基板的预定区域以提供多个电路功能，例如互连层。

公开(公告)号：KR1019960012081A

公开(公告)日：1996-04-20

申请号：KR1019950031853

申请日：1995-09-26

Applicant: 닛본 덴끼 가부시끼가이샤

Inventor： 도미하리요시노리

IPC: H01J1/30

CPC classification number: H01J3/022 ,  H01J2201/319

Abstract: 전자방출소스는그물망의형태로절연기판(1)상에형성된제1전극(12)과전 표면상에형성된저항성코팅(13)을포함한다. 다수의음극(14)은각 음극(14)과제1전극(12)사이에동일한최소간격을가지도록그물망패턴의중심부에배치되며, 그러므로저항성코팅내의단락-회로전류를제한하는능력을개선한다.

Abstract translation: 电子发射源包括形成在形成为网眼过电流表面的形式的绝缘基片（1）在第一电极12上的电阻涂层（13）。 多个阳极14 eungak阳极14被设置在网格图案的中心到第一电极12之间的相同的最小间距的问题，从而在涂层中的短路电阻，以改善以限制电流电路的能力。

公开(公告)号：US08390538B2

公开(公告)日：2013-03-05

申请号：US13244078

申请日：2011-09-23

Applicant: Yoon Ho Song ,  Dae Jun Kim ,  Jin Woo Jeong ,  Jin Ho Lee ,  Kwang Yong Kang

Inventor： Yoon Ho Song ,  Dae Jun Kim ,  Jin Woo Jeong ,  Jin Ho Lee ,  Kwang Yong Kang

IPC: G09G5/00

CPC classification number: H01J1/304 ,  G09G3/22 ,  H01J29/04 ,  H01J31/127 ,  H01J2201/319

Abstract: A field emission pixel includes a cathode on which a field emitter emitting electrons is formed, an anode on which a phosphor absorbing electrons from the field emitter is formed, and a thin film transistor (TFT) having a source connected to a current source in response to a scan signal, a gate receiving a data signal, and a drain connected to the field emitter. The field emitter is made of carbon material such as diamond, diamond like carbon, carbon nanotube or carbon nanofiber. The cathode may include multiple field emitters, and the TFT may include multiple transistors having gates to which the same signal is applied, sources to which the same signal is applied, and drains respectively connected to the field emitters. An active layer of the TFT is made of a semiconductor film such as amorphous silicon, micro-crystalline silicon, polycrystalline silicon, wide-band gap material like ZnO, or an organic semiconductor.

Abstract translation: 场发射像素包括其上形成有发射电子的场致发射体的阴极，形成从场致发射体吸收电子的荧光体的阳极以及响应于电流源的源极的薄膜晶体管（TFT） 扫描信号，接收数据信号的栅极和连接到场发射器的漏极。 场发射体由诸如金刚石，类金刚石碳，碳纳米管或碳​​纳米纤维的碳材料制成。 阴极可以包括多个场发射器，并且TFT可以包括多个晶体管，其具有施加相同信号的栅极，施加相同信号的源极以及分别连接到场发射极的漏极。 TFT的有源层由诸如非晶硅，微晶硅，多晶硅，宽带隙材料如ZnO的半导体膜或有机半导体制成。

公开(公告)号：US07671525B2

公开(公告)日：2010-03-02

申请号：US11584128

申请日：2006-10-20

Applicant: Si-Myeong Kim

Inventor： Si-Myeong Kim

IPC: H01J63/04 ,  H01J1/62

CPC classification number: H01J1/304 ,  H01J31/127 ,  H01J2201/319

Abstract: An electron emission device and display including the same include a substrate; a cathode electrode including a first electrode portion formed on the substrate and having opening portions, and second electrode portions placed within respective ones of the opening portions such that the second electrodes are separated from the first electrode; a resistance layer electrically interconnecting the first electrode portion and the second electrode portions of the cathode electrode; and electron emission regions electrically connected to the second electrode portions. A width of the second electrode portions or of the resistance layer between the first and second electrode portions varies along a longitudinal direction of the cathode electrode.

Abstract translation: 包括其的电子发射装置和显示器包括基板; 阴极，其包括形成在所述基板上并具有开口部的第一电极部，以及设置在所述开口部的各个开口部内的第二电极部，使得所述第二电极与所述第一电极分离; 使第一电极部和阴极的第二电极部电连接的电阻层; 以及与第二电极部电连接的电子发射区域。 第一电极部分或第二电极部分之间的电阻层的宽度沿着阴极电极的长度方向变化。

公开(公告)号：US20090185661A1

公开(公告)日：2009-07-23

申请号：US12113726

申请日：2008-05-01

Applicant: Yun Zou ,  Mark E. Vermilyea ,  Louis Paul Inzinna ,  Antonio Caiafa

Inventor： Yun Zou ,  Mark E. Vermilyea ,  Louis Paul Inzinna ,  Antonio Caiafa

IPC: H01J35/06 ,  H05B37/02

CPC classification number: H01J3/021 ,  H01J1/30 ,  H01J1/3048 ,  H01J3/027 ,  H01J35/065 ,  H01J35/14 ,  H01J2201/319 ,  H01J2203/0204 ,  H01J2235/062 ,  H01J2235/068

Abstract: A system and method for addressing individual electron emitters in an emitter array is disclosed. The system includes an emitter array comprising a plurality of emitter elements arranged in a non-rectangular layout and configured to generate at least one electron beam and a plurality of extraction grids positioned adjacent to the emitter array, each extraction grid being associated with at least one emitter element to extract the at least one electron beam therefrom. The field emitter array system also includes a plurality of voltage control channels connected to the plurality of emitter elements and the plurality of extraction grids such that each of the emitter elements and each of the extraction grids is individually addressable. In the field emitter array system, the number of voltage control channels is equal to the sum of a pair of integers closest in value whose product equals the number of emitter elements.

Abstract translation: 公开了一种用于寻址发射极阵列中的各个电子发射体的系统和方法。 该系统包括发射器阵列，其包括以非矩形布局布置的多个发射体元件，并且被配置为产生至少一个电子束和邻近发射器阵列定位的多个提取栅格，每个提取栅格与至少一个 发射极元件从其中提取至少一个电子束。 场发射器阵列系统还包括连接到多个发射体元件和多个提取栅格的多个电压控制通道，使得每个发射极元件和每个提取栅格可单独寻址。 在场发射极阵列系统中，电压控制通道的数量等于产品等于发射极元件数量的最接近值的一对整数之和。

公开(公告)号：US20090072750A1

公开(公告)日：2009-03-19

申请号：US12233859

申请日：2008-09-19

Applicant: Akintunde I. Akinwande ,  Luis Fernando Velasquez-Garcia

Inventor： Akintunde I. Akinwande ,  Luis Fernando Velasquez-Garcia

IPC: H01J1/304 ,  H01J9/02

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: A field emitter array structure is provided. The field emitter array structure includes a plurality of vertical un-gated transistor structures formed on a semiconductor substrate. The semiconductor substrate includes a plurality of vertical pillar structures to define said un-gated transistor structures. A plurality of emitter structures are formed on said vertical un-gated transistor structures. Each of said emitter structures is positioned in a ballasting fashion on one of said vertical un-gated transistor structures so as to allow said vertical ungated transistor structure to effectively provide high dynamic resistance with large saturation currents.

Abstract translation: 提供场发射器阵列结构。 场发射极阵列结构包括形成在半导体衬底上的多个垂直未门控晶体管结构。 半导体衬底包括多个垂直柱结构，以限定所述未门控晶体管结构。 在所述垂直非门控晶体管结构上形成多个发射极结构。 所述发射极结构中的每一个以压载方式定位在所述垂直非门控晶体管结构中的一个上，以便允许所述垂直非门控晶体管结构有效地提供具有较大饱和电流的高动态电阻。

公开(公告)号：US20080197766A1

公开(公告)日：2008-08-21

申请号：US11915238

申请日：2006-05-29

Applicant: Thomas Goislard de Monsabert ,  Jean Dijon

Inventor： Thomas Goislard de Monsabert ,  Jean Dijon

IPC: H01J1/62 ,  B44C1/22 ,  H01J1/14

CPC classification number: H01J9/025 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  D01F9/127 ,  H01J1/3048 ,  H01J31/127 ,  H01J2201/30469 ,  H01J2201/319 ,  H01L51/0048 ,  H01L51/0541 ,  H01L51/055

Abstract: A process for making nanostructures on a support, including: supplying a support including a surface layer on one of its faces, covering the surface layer by a catalyst layer structured according to a pattern exposing areas of the surface layer covered by the catalyst and areas of the surface layer not covered by the catalyst, etching the thickness of the surface layer in the areas not covered by the catalyst layer, and selectively growing nanostructures on the areas of the surface layer covered by the catalyst. The process can also be used to make cathode structures with electrically independent nanostructures.

Abstract translation: 一种在载体上制备纳米结构的方法，包括：在其一个表面上提供包括表面层的载体，通过根据暴露由催化剂覆盖的表面层的区域的图案构成的催化剂层覆盖表面层， 表面层未被催化剂覆盖，蚀刻未被催化剂层覆盖的区域中的表面层的厚度，并且在由催化剂覆盖的表面层的区域上选择性地生长纳米结构。 该方法也可用于制备具有电独立纳米结构的阴极结构。

公开(公告)号：US07323814B2

公开(公告)日：2008-01-29

申请号：US11514196

申请日：2006-09-01

Applicant: Toshihiko Miyazaki ,  Takeo Ono ,  Hideaki Mitsutake ,  Mitsutoshi Hasegawa ,  Eiji Yamaguchi ,  Shuji Yamada ,  Yasuyuki Todokoro

Inventor： Toshihiko Miyazaki ,  Takeo Ono ,  Hideaki Mitsutake ,  Mitsutoshi Hasegawa ,  Eiji Yamaguchi ,  Shuji Yamada ,  Yasuyuki Todokoro

IPC: H01J1/62

CPC classification number: G09G3/2011 ,  G09G3/2014 ,  G09G3/22 ,  G09G5/02 ,  G09G2310/0229 ,  G09G2310/0267 ,  G09G2310/027 ,  G09G2320/0276 ,  G09G2320/0626 ,  G09G2330/02 ,  G09G2330/027 ,  G09G2330/04 ,  G09G2340/125 ,  H01J1/316 ,  H01J29/02 ,  H01J29/028 ,  H01J29/04 ,  H01J29/085 ,  H01J29/86 ,  H01J29/864 ,  H01J29/90 ,  H01J29/92 ,  H01J29/94 ,  H01J31/127 ,  H01J2201/3165 ,  H01J2201/319 ,  H01J2329/02 ,  H01J2329/0489 ,  H01J2329/323 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8655 ,  H01J2329/866 ,  H01J2329/90 ,  H01J2329/92 ,  H04N5/70 ,  H04N7/012 ,  H04N9/12 ,  H04N9/30

Abstract: An image formation apparatus is disclosed which includes, within an enclosure configured by a pair of substrates placed face to face and an external frame placed between the substrates, an electron source placed on one of the pair of substrates, an image formation material placed on the other substrate, and spacers placed between the substrates, characterized in that the spacers and the external frame is conductive and device is provided for electrically connecting the spacers and the external frame so that the equipotential surfaces between the spacers and the external frame are quasi-parallel when driven.

Abstract translation: 公开了一种图像形成装置，其包括在由面对面放置的一对基板和设置在基板之间的外部框架构成的外壳内，放置在一对基板之一上的电子源，放置在该基板上的图像形成材料 其它基板和位于基板之间的间隔物，其特征在于，间隔件和外框架是导电的，并且提供了用于电连接间隔件和外框架的装置，使得间隔件和外框之间的等电位面准准平行 驱动时。

公开(公告)号：US07268482B2

公开(公告)日：2007-09-11

申请号：US11330046

申请日：2006-01-11

Applicant: James J. Hofmann ,  John K. Lee ,  David A. Cathey ,  Glen E. Hush

Inventor： James J. Hofmann ,  John K. Lee ,  David A. Cathey ,  Glen E. Hush

IPC: H01J1/304 ,  H01J19/24

CPC classification number: H01J3/022 ,  H01J9/241 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: An apparatus for stabilizing the threshold voltage in an active matrix field emission device is disclosed. The apparatus includes the formation of radiation-blocking elements between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED.

Abstract translation: 公开了一种用于稳定有源矩阵场致发射器件中的阈值电压的装置。 该装置包括在FED的阴极发光显示屏和形成在FED的底板上的半导体结之间形成辐射阻挡元件。

公开(公告)号：US07239075B2

公开(公告)日：2007-07-03

申请号：US11416338

申请日：2006-05-02

Applicant: Kanwal K. Raina ,  Benham Moradi

Inventor： Kanwal K. Raina ,  Benham Moradi

IPC: H01J19/02

CPC classification number: H01J1/30 ,  H01J1/304 ,  H01J1/3044 ,  H01J9/025 ,  H01J31/127 ,  H01J2201/319 ,  H01J2329/00

Abstract: Described herein is a resistor layer for use in field emission display devices and the like, and its method of manufacture. The resistor layer is an amorphous silicon layer doped with nitrogen and phosphorus. Nitrogen concentration in the resistor layer is preferably between about 5 and 15 atomic percent. The presence of nitrogen and phosphorus in the silicon prevents diffusion of Si atoms into metal conductive layers such as aluminum, even up to diffusion and packaging temperatures. The nitrogen and phosphorus also prevent defects from forming at the boundary between the resistor layer and metal conductor. This leads to better control over shorting and improved resistivity in the resistor.

Abstract translation: 这里描述的是用于场发射显示装置等的电阻层及其制造方法。 电阻层是掺杂有氮和磷的非晶硅层。 电阻层中的氮浓度优选为约5至15原子％。 硅中的氮和磷的存在防止Si原子扩散到金属导电层如铝中，甚至达到扩散和封装温度。 氮和磷还可以防止在电阻层和金属导体之间的边界处形成缺陷。 这导致更好地控制电阻器的短路和改善电阻率。