Abstract:
PROBLEM TO BE SOLVED: To provide a vertical conduction electronic power device in which an output resistance, thermal resistance, size and gate change value are reduced. SOLUTION: The vertical conduction electronic power device includes gate areas 20, source areas 25 and drain areas 30 in an epitaxial layer 40 on a semiconductor substrate 10; gate sections 21, source sections 26 and drain sections 31 formed by a first metallization level; and gate terminals/pads, source terminals/pads 65 and drain terminals/pads formed by a second metallization level. The device extends perpendicularly to the substrate 10 and is provided with sinker structures 45 formed by grids of sinkers S arranged under both of first and second regions of individual drain areas 30. The sinker structure operates as an electrical conduction channel for the current directing from the source area 25 to the drain area 30 through the substrate 10. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To reduce a quantization noise in a frequency band positioned outside a band used for a signal. SOLUTION: The power amplification device is provided with an input part for receiving a signal having a useful frequency band, and a power amplification means of the delta-sigma type. The power amplification means of the delta-sigma type (MAP) exhibits an order greater than or equal to one in the useful band of the signal and an order greater than or equal to one outside the said useful band. Thus, a position of a zero point of a noise transmission function can be adjusted to adjust an S/N in the useful band, and a value of one or multiple frequency bands positioned outside the useful band of which the quantization noise is desired to be minimized, is made adjustable. COPYRIGHT: (C)2004,JPO&NCIPI
Abstract:
A device for protecting an electronic apparatus includes: a motion-detection device (7, 8, 9), for supplying at least one alert signal (S FF , S R ) in response to pre-determined conditions of motion of the protection device; a counter (18); a first logic circuit (19; 219), for incrementing the counter (18) in the presence of a first value ("1") of the alert signal (S FF , S R ), in a first operating condition; and a second logic circuit (20), for generating a protection signal (INT) on the basis of a count value (C) of the counter (18). In addition, the first logic circuit (19; 219) is configured for decrementing the counter in the presence of a second value ("0") of the alert signal (S FF , S R ), in the first operating condition.