Method for driving LCD modules with scale of greys by PWM technique and reduced power consumption
    31.
    发明公开
    Method for driving LCD modules with scale of greys by PWM technique and reduced power consumption 审中-公开
    用于通过PWM技术Grautonanzeige执行液晶显示模块和降低的功耗的控制方法

    公开(公告)号:EP1341150A1

    公开(公告)日:2003-09-03

    申请号:EP02425109.2

    申请日:2002-02-28

    CPC classification number: G09G3/3625 G09G3/2014 G09G3/3622 G09G2330/021

    Abstract: Herein described is a driving method for LCD modules having a multiplicity of display elements placed in the intersections of a matrix having a plurality of row electrodes and a plurality of column electrodes. The method comprises a first phase for scanning all the row electrodes of said matrix in an interval of scanning time (NT). The first phase comprises a second phase comprising the generation of a first signal suited to energizing at least one row electrode of the matrix for a first preset interval of time (T), the generation of second signals (C3(t), C5(t)) suited to energizing respectively each column electrode of said matrix simultaneously with the energizing of at least one row electrode. The second signals (C3(t), C5(t)) are suited to determining the grey level of each display element of at least one row electrode energized by means of an alternance of corresponding values distinct signal levels (Von, Voff, V1-V3) for intervals of time (T1on, T1off) comprised in the first preset interval of time (T) by means of a first PWM modulation. The first preset interval of time (T) is lower than the interval of scanning time (NT). The first phase comprises a third phase successive to the second phase and comprising the generation of another first signal suited to energizing at least another row electrode of said matrix for a second preset period of time (T) equal and successive to the first preset interval of time, the generation of third signals (C3(t), C5(t)) suited to energizing each column electrode of the matrix simultaneously to said at least another row electrode; the third signals are suited to determining the grey level of each display element of at least another row electrode energized by means of an altemance of values corresponding to said distinct signal levels (Von, Voff, V1-V3) for intervals of time (T2on, T2off) comprised in said second preset interval of time (T) by means of a second PWM modulation. The second PWM modulation is such to ensure the continuity of the signal level of said second signals (C3(t), C5(t)) and third signals (C3(t), C5(t)) in the passage from the first preset period of time (T) to the second preset period of time (T). (Figure 5).

    Abstract translation: 快来描述的是一种用于驱动具有在具有电极行的多个部分并加以电极柱的多个A矩阵的交叉点放置显示元件的多个液晶显示模块的方法。 该方法包括在扫描时间(NT)间隔扫描电极与上述矩阵的所有行中的第一阶段。 所述第一相包含第二相,其包括适合于激励所述矩阵的至少一个行电极对的时间(T)的第一预设间隔的第一信号的产生,第二信号(C 3(t)的,C5(T的产生 ))适合于分别与至少一个行电极的通电同时激励所述矩阵的每一列电极。 第二信号(C 3(t)的,C5(t))的适合于所确定的采矿由对应值的alternance手段通电的至少一个行电极的每个显示元件的灰度级不同信号电平(从,V关闭,V1 V3)为在时间(T)由第一PWM调制手段的第一预设间隔由时间(T1ON,T1off)区间。 时间的第一预设时间间隔(T)比的扫描时间(NT)的时间间隔低。 所述第一相包含第三相连续的第二相和包含至少适合于激励所述矩阵的另一行电极的时间(T)相等,并且连续到的所述第一预定间隔的第二预设时间段的另一第一信号的生成 时间,(C 3(t)的,C5(t))的适合于同时激励所述矩阵的每一列电极到所述至少另一行电极产生第三信号的; 第三信号适合于所确定的采矿由对应于所述不同信号电平值的altemance手段(通电至少另一行电极的每个显示元件的灰度级(从,V关闭,V1-V3),用于时间T2ON的间隔, T2off)由第二PWM调制的机构,在上述由时间(T)的第二预设时间间隔。 第二PWM调制正在寻求确保的信号电平的连续性,所述第二信号(C3(t)的,C5(t))和第三信号(C3(t)的,C5(T))在从所述第一预设通道 的时间周期(T)时间的第二预设时间段(T)。 (图5)。

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    32.
    发明公开
    "Supply system of the driving voltage generator of the rows and of the columns of a liquid crystal display" 审中-公开
    “用于驱动液晶显示器的行和列电源系统电压发生器”

    公开(公告)号:EP1324304A1

    公开(公告)日:2003-07-02

    申请号:EP01830810.6

    申请日:2001-12-27

    CPC classification number: G09G3/3696 G09G3/3622 G09G2330/023

    Abstract: The present invention refers to a supply system of the driving voltage generator of the rows and of the columns of a liquid crystal display. The supply system comprises first and second generator circuits (D3,D4) which output respective prefixed voltages (V3,V4). Each generator circuit receives two supply voltages. The first generator receives, via one voltage supply terminal, a first voltage (VLCD). The second generator receives, via one voltage supply terminal, a second voltage (GND). The other supply terminals of the generators are each connected to a charge storage device (CTNK), e.g. a capacitor, which acts as a charging tank. Charge stored in the capacitor is shared by both generators, and a control circuit (CONT) causes the voltage across the capacitor to lie within a predefined range.

    Abstract translation: 本发明涉及到行的驱动电压产生器的供给系统和液晶显示器的列的。 所述供应系统包括第一和第二发生器电路(D3,D4)哪个输出respectivement前缀电压(V3,V4)。 每个发生器电路接收两个电源电压。 第一发生器接收,经由一个电压提供端,第一电压(VLCD)。 第二生成器接收,经由一个电压源端,第二电压(GND)。 发电机的另一电源端子分别连接到电荷存储装置(CTNK),例如 电容器,其用作一个充电罐。 存储在电容器的电荷被两个发生器共享;以及控制电路(CONT)使电容器两端的电压,使之处于预定范围内。

    Method of transmitting symbols
    34.
    发明公开
    Method of transmitting symbols 有权
    Verfahren zurÜbertragungvon Symbolen und HomePlug AV系统

    公开(公告)号:EP2458769A1

    公开(公告)日:2012-05-30

    申请号:EP11190986.7

    申请日:2011-11-28

    Applicant: Dora S.p.A.

    Abstract: A method of transmitting symbols of a digital transmission constellation from a set thereof, ordered from a smallest to a greatest number of bits per symbol, may include identifying a first constellation from the set that is configured to communicate with a threshold error rate and has a greatest signal-to-noise ratio smaller than a signal-to-noise ratio of a received signal. The method may also include identifying a second constellation from the set that corresponds to a constellation with a number of bits per symbol immediately greater than the first constellation. The method may further include determining first and second probabilities of use of the first and second constellation that would generate an expected number of erroneous bits corresponding to the threshold error rate. The method may further include transmitting a symbol with a constellation selected randomly between the first and second constellation according to the first and second probabilities, respectively.

    Abstract translation: 从每个符号的从最小位数到最大位数排列的数字传输星座的符号的传输方法可以包括从被配置为与阈值错误率进行通信的集合中识别第一星座,并且具有 最大的信噪比小于接收信号的信噪比。 该方法还可以包括从对应于具有立即大于第一星座的每个符号的比特数的星座的集合识别第二星座图。 该方法可以进一步包括确定使用第一和第二星座的第一和第二概率,其将产生对应于阈值错误率的预期数量的错误比特。 该方法还可以包括分别根据第一和第二概率发送具有在第一和第二星座之间随机选择的星座的符号。

    Method of detecting a frame synchronization pattern or a unique word in a received digital signal
    35.
    发明公开
    Method of detecting a frame synchronization pattern or a unique word in a received digital signal 有权
    一种用于确定在所接收的数字信号的帧同步模式或者一个唯一字的方法

    公开(公告)号:EP2280510A1

    公开(公告)日:2011-02-02

    申请号:EP10168409.0

    申请日:2010-07-05

    Applicant: Dora S.p.A.

    CPC classification number: H04L7/042 H04J3/0608

    Abstract: The recognition of a frame synchronization pattern or unique word of a received signal may be enhanced using a data-aided estimator of the signal-to-noise ratio (SNR) together with a correlation detector of the unique word to be received. Detecting a frame synchronization pattern or a unique word in a received signal, the SNR is estimated on the received signal with a data-aided SNR estimator using the unique word to be received. If the estimated SNR exceeds a certain threshold, an eventual recognition of the unique word established by a correlation correlator of the receiver is considered reliable. Comparing the SNR with the threshold may be carried out either before or after the correlator has processed the unique word.

    Abstract translation: 一个接收的信号的帧同步模式或唯一字的识别可使用信噪比(SNR)与要接收的唯一字的相关检测器一起的数据辅助估计器来增强。 检测接收信号的帧同步模式或者一个唯一字时,SNR估计有关与使用将要接收的唯一字数据辅助SNR估计的接收信号。 如果估计的信噪比超过某个阈值,最终的识别由接收机的相关相关设立唯一字被认为是可靠的。 与阈值进行比较SNR可之前或相关处理了独特的字后进行。

    Data-aided signal-to-noise ratio estimate for M-DPSK modulation systems with division of the received samples into blocks
    37.
    发明公开
    Data-aided signal-to-noise ratio estimate for M-DPSK modulation systems with division of the received samples into blocks 有权
    的信噪比为M-DPSK调制系统的数据辅助估计与在块中的接收到的样本的分裂

    公开(公告)号:EP2202906A1

    公开(公告)日:2010-06-30

    申请号:EP09180214.0

    申请日:2009-12-21

    Applicant: Dora S.p.A.

    CPC classification number: H04L27/2331 H04B17/309 H04L1/206

    Abstract: There is described a method for estimating the signal-to-noise ratio for a packet transmission and reception system of signals with a known sequence, with M-DPSK modulation. The method comprises the division of N known symbols ( a k ) and of N samples of the received signal ( r ( t )) at the output of the channel into B blocks of L length with B and L positive integer numbers and B greater than one and wherein B is expressed by B = N - L L - O + 1 ≥ N L wherein O indicates the overlapping factor of consecutive blocks having length L and the calculation of the estimation of the signal-to-noise ratio by means of the equation: SNR = L - 1 B ⋅ L ∑ b = 0 B - 1 1 L ∑ k = l b l b + L - 1 r k ⁢ a k * 2 1 B ∑ b = 0 B - 1 1 L ∑ k = l b l b + L - 1 r k 2 - 1 B ∑ b = 0 B - 1 1 L ∑ k = l b l b + L - 1 r k ⁢ a k * 2 - 1 L wherein l b = b • (L - O) + l where l is the index denoting the position of the first known symbol of the sequence of length N in the packet, r k is the sample of the received signal at the output of the channel correspondent to the known transmitted symbol, a k is the M-DPSK modulated known transmitted symbol, a * k is the complex conjugated of the M-DPSK modulated known transmitted symbol and SNR indicates the estimation of the signal-to-noise ratio.

    Abstract translation: 描述了一种用于估计信噪比用于信号的分组发送和接收系统具有已知序列,用M-DPSK调制的方法。 该方法包括和输出处的信道的与B和L的正整数和B长度L的B嵌段所接收信号的N个样本(R(T))的N个已知的符号(AK)的分割大于一 和worin B由乙过表达= N - LL - O + 1‰¥NL worin O表示连续块具有长度L,并且由公式的装置信噪比的估计的计算重叠因子: SNR = L - 1乙

    SYSTEM FOR DRIVING COLUMNS OF A LIQUID CRYSTAL DISPLAY
    39.
    发明公开
    SYSTEM FOR DRIVING COLUMNS OF A LIQUID CRYSTAL DISPLAY 审中-公开
    系统,用于控制液晶显示器的列

    公开(公告)号:EP1532614A1

    公开(公告)日:2005-05-25

    申请号:EP03761493.0

    申请日:2003-06-23

    CPC classification number: G09G3/3685 G09G2330/021

    Abstract: The present invention refers to a system for driving columns of a liquid crystal display comprising a logic circuitry (10) operating in a supply path between a first (VDD) and a second (VSS) supply voltage in which the first supply voltage is (VDD) higher than the second supply voltage (VSS). The logic circuitry (10) is capable of generating starting from the first logic signals (LOW_FRAME, WHITE_PIX) in input second logic signals (CP, CN, CP_N, CN_N) in output whose value is equal to the first (VDD) or second (VSS) supply voltage. The device comprises two elevator devices (11, 12) coupled to the logic circuitry (10) and operating in a supply path between a third supply voltage (VLCD) greater than the first supply voltage (VDD) and the second supply voltage (VSS); the elevator devices (11, 12) are capable of raising the value of the second logic signals (CP, CN, CP_N, CN_N). The device also comprises a first (T11-T12) and a second (T13-T14) pair of transistors shaving different supply paths (VLCD-VA, VB-VSS) and having an output terminal (OUT) in common; the first (T11-T12) and the second (T13-T14) pair of transistors are connected to the elevator devices (11, 12) so as to determine the drive signal of a column. The device comprises turnoff circuitry (15) operating in a supply path between the third (VLCD) and the second supply voltage (VSS) and coupled to the two elevator devices (11, 12). The circuitry (15) is capable of keeping one of the two pairs of transistors (T11-T12, T13-T14) in a turnoff state in the period of time of a frame when the other of the two pairs of transistors (T11-T12, T13-T14) is in operative conditions.

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