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公开(公告)号：MC2321A1
公开(公告)日：1993-10-25
申请号：MC2229
申请日：1992-06-12
Applicant: KOREA TELECOMMUNICATION
Inventor： M IL SONG HAN
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：DE3939635C2
公开(公告)日：1993-09-23
申请号：DE3939635
申请日：1989-11-30
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, DAEJEON, KR , KOREA TELECOMMUNICATION AUTHORITY, SEOUL/SOUL, KR
IPC: H01L29/812 , H01L21/285 , H01L21/338 , H01L29/417 , H01L29/78
Abstract: The invention provides the method of manufacturing a self-aligned GaAs MESFET wherein the Si thin film formed by PECVD (Plasma Enhanced Chemical Vapor Deposition) and the Si3N4 film formed by PCVD (Photo Chemical Vapor Deposition) onto the GaAs substrate are used as the capping film in the activation process, and then the self-aligned MESFET with the T type gate is manufactured through the selective chemical vapor deposition of the tungsten onto the Si thin film. As a result, the gap between the gate electrode and the n+ layer can be adjusted itself.
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公开(公告)号：GB2265284A
公开(公告)日：1993-09-22
申请号：GB9305529
申请日：1993-03-17
Applicant: KOREA ELECTRONICS TELECOMM , KOREA TELECOMMUNICATION
Inventor： LEE BHUM CHEOL , PARK KWON CHUL , BAHK HANG GU
Abstract: A bit synchronizer for NRZ data wherein a loop gain of a phase locked loop in the bit synchronizer is not varied sensitively to bit pattern and rate of the NRZ data and a voltage controlled oscillator in the bit synchronizer oscillates synchronously with a multiple of a frequency of an external reference clock pulse oven in the absence of NRZ data transitions or over a wide range of variation of a clock frequency of the voltage controlled oscillator, so that the NRZ data and clock can be recovered stably. According to the invention, the bit synchronizer comprises a phase comparator (21), a first gain controller (22), a frequency comparator (23), a second gain controller (24), a N-frequency divider (25), a low pass filter (26) and a voltage controlled oscillator (27). The first and second gain controllers limit the gains of the place and frequency comparators, respectively, to predetermined values.
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公开(公告)号：FR2683353A1
公开(公告)日：1993-05-07
申请号：FR9208504
申请日：1992-07-09
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：LU88148A1
公开(公告)日：1993-02-15
申请号：LU88148
申请日：1992-07-15
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
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Patent Agency Ranking
公开(公告)号：DK81692D0
公开(公告)日：1992-06-19
申请号：DK81692
申请日：1992-06-19
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：SE9201883D0
公开(公告)日：1992-06-18
申请号：SE9201883
申请日：1992-06-18
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN S
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：SE9201882D0
公开(公告)日：1992-06-18
申请号：SE9201882
申请日：1992-06-18
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN S
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：DE4018898A1
公开(公告)日：1991-01-10
申请号：DE4018898
申请日：1990-06-13
Applicant: KOREA ELECTRONICS TELECOMM , KOREA TELECOMMUNICATION
Inventor： SHIN DONG KWAN
Abstract: This invention provides a digital auto-phase-controlled retiming circuit which automatically locates the retiming clock phase in the center of input data eye pattern by detesting the phase difference between retiming clock and data and tracking adoptively the mutual phase variation in a case that the mutual phase difference between data and retiming clock is uncertain and changes according to time in digital transmission and/or digital signal processing systems.
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40.发明专利
公开(公告)号：DE4010889A1
公开(公告)日：1990-10-11
申请号：DE4010889
申请日：1990-04-04
Applicant: ELECT & TELECOMM RESEARCH INST , KOREA TELECOMMUNICATION
Inventor： SANG-BAE KIM
Abstract: A laser diode is formed with an electrode (1), isolation layer (2), 'n' impregnated In.P layer (3), cover layer (4), a In. boundary surface (5), an In.P current blocking layer (6) and an active In.Ga. As.P layer (7). The structure is formed in a series of stages, with the first involving the use of a Si.O2 etching mask formed on the cover layer (4). After etching the centre layer (4) remains while the surrounding regions are removed. Subsequent steps form the remaining sections using further etching. USE/ADVANTAGE - For optical communication system. Improves quality of laser diode and avoids damage during manufacture.
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