公开(公告)号：JPH02119150A

公开(公告)日：1990-05-07

申请号：JP25073689

申请日：1989-09-28

Applicant: CASIO COMPUTER CO LTD

Inventor： SUZUKI SATOSHI ,  KUWABARA OSAMU ,  MUTO JIRO ,  SHINOZAKI HIDEKAZU

IPC: H01L21/60 ,  H05K3/36

Abstract: PURPOSE:To perform appropriate soldering to both of the inside and outside ends of metallic lead foil by making the thickness of the solder at the outside end of the metallic lead foil thicker than that at the inside end. CONSTITUTION:The pattern of prescribed metallic lead foil 7 is formed by laminating a carrier film 4 provided with opening 6 and 4a with metallic foil. Soldering 7c of the inside end 7a is performed to the whole surface of the foil 7 to a thickness of 0.2-0.6mum and an IC chip 5 is bonded to the inside end 7a. A resin 8 is applied to a certain surface of the electrode 5d of the chip 5 by potting and the resin 8 is dried. Then soldering 7c of the outside end 7b is performed to a thickness of 0.2-2.0mum and a soldering flux is applied to the outside end 7b by potting. Then the outside end 7b is put on the connecting lead 2a of the liquid crystal panel 5 and fixed with 8 vacuum head 21. After fixing, the outside end 7b is connected with the connecting lead 2a by means of a thermocompression fixing head 22.

公开(公告)号：JPH01135093A

公开(公告)日：1989-05-26

申请号：JP29215187

申请日：1987-11-20

Applicant: CASIO COMPUTER CO LTD

Inventor： SUZUKI SATOSHI ,  KUWABARA OSAMU ,  MUTO JIRO ,  SHINOZAKI HIDEKAZU

IPC: H01L21/60 ,  B23K1/00 ,  G09F9/00 ,  H05K3/34 ,  H05K3/36

Abstract: PURPOSE:To set the quantity of solder and the interval of the ends of leads to constant values and to simultaneously form and jointing adhere the bent parts of the leads by securing many metal lead foils connected to the electrodes of an IC chip, forming a solder-plating layer on a part exposed from an opening, and thermally press-bonding the center of the lead foil facing the opening. CONSTITUTION:An IC unit 1 is formed with an opening 6 which is larger than the profile of an IC chip 5 at a carrier film 4, many metal lead foils 7,... are pattern-formed, and the chip 5 is bonded to the inner ends 7a,... of the foils 7 protruding into the opening 6. The outer ends 7b,... of the side of a liquid crystal display panel 2 are submerged at central parts 7b1 facing the opening 4a in the opening 4a, thermally press-bonded through solder plating to the leads 2a of the panel 2, oblique parts 7b2, 7b3 are obliquely risen toward the upper edge of the opening 4a at both side ends of the submerged part 7b1, triangular solder reservoirs 9, 9 are thereby formed, and the parts 7b2, 7b3 are rigidly jointed to the leads 2a by the reservoirs 9, 9.

公开(公告)号：JP2011129814A

公开(公告)日：2011-06-30

申请号：JP2009289115

申请日：2009-12-21

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： MASUDA TAKASHI ,  KUWABARA OSAMU

IPC: H01L23/00 ,  H01L21/66 ,  H01L21/677

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To solve such a problem that there are difficulties in manufacturing a semiconductor device since there causes great warpage in a semiconductor wafer by allowing laser to be irradiated onto the semiconductor wafer and by carrying out marking thereon.
SOLUTION: The semiconductor chip 10 with a semiconductor substrate 11 ground to be thinned and a backside thereof bonded to a dicing tape 21 is carried to a chuck 64 from a load 50. The mark is sequentially formed by laser on the backside of the semiconductor substrate 11 in a marking unit 80 after the semiconductor chip 10 is picked up and inspection of the marking substrate surface is carried out in a pre-marking inspection unit 70. The marking is carried out while the semiconductor chip 10 is individually separated, thereby eliminating the occurrence of warpage in the semiconductor substrate 11.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题为了解决半导体器件制造困难的问题，因为通过允许激光照射到半导体晶片上并通过在其上进行标记，导致半导体晶片中的翘曲变大。 解决方案：将半导体衬底11磨削成半导体晶片10并将其背面粘合到切割带21上的半导体芯片10从负载50传送到卡盘64上。该标记由激光依次形成在背面 拾取半导体芯片10之后的标记单元80中的半导体衬底11，并且在预标记检查单元70中执行标记衬底表面的检查。在半导体芯片10被单独分离的同时执行标记， 从而消除了半导体衬底11中翘曲的发生。版权所有：（C）2011，JPO＆INPIT

公开(公告)号：JP2010147353A

公开(公告)日：2010-07-01

申请号：JP2008324901

申请日：2008-12-22

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： FUJII NOBUMITSU ,  SHIODA JUNJI ,  KOMUTSU YASUSUKE ,  OKADA OSAMU ,  KUWABARA OSAMU ,  KIZAKI MASAYASU ,  MASUDA TAKASHI

IPC: H01L23/12

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To make a whole body hard to warp in hardening a resin protective film when forming the resin protective film for protecting the bottom and side surfaces of silicon substrates. SOLUTION: Firstly, the first grooves 29 are formed in a semiconductor wafer 21 and a sealing film 12, etc., arranged in a part corresponding to dicing streets 22 and both the sides. In this state, the semiconductor wafer 21 is separated into individual silicon substrates 1 by forming the first grooves 29. Secondly, the resin protective film 11 is formed on the bottom surfaces of the respective silicon substrates 1 including the first grooves 29. In this case, the semiconductor wafer 21 is separated into the individual silicon substrates 1, but a support plate 25 is made to adhere onto the upper surface of a sealing film 12 including soldering balls 13 via an adhesive layer 23, etc. Thus, when forming the resin protective film 11, the whole body including the individually separated silicon substrates 1 is made to be hard to warp. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：当形成用于保护硅衬底的底表面和侧表面的树脂保护膜时，使整体难以翘曲树脂保护膜的硬化。 解决方案：首先，第一凹槽29形成在半导体晶片21和密封膜12等中，其布置在对应于切割街道22和两侧的部分中。 在这种状态下，通过形成第一凹槽29将半导体晶片21分离成单独的硅基板1.其次，在包括第一凹槽29的各个硅基板1的底表面上形成树脂保护膜11.在这种情况下 ，将半导体晶片21分离成单独的硅基板1，但是通过粘合层23等将支撑板25粘附到包括焊球13的密封膜12的上表面上。因此，当形成树脂 保护膜11使包括单独分离的硅基板1的整体难以翘曲。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2010140949A

公开(公告)日：2010-06-24

申请号：JP2008313220

申请日：2008-12-09

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： KOMUTSU YASUSUKE ,  OKADA OSAMU ,  KUWABARA OSAMU ,  SHIODA JUNJI ,  FUJII NOBUMITSU

IPC: H01L23/12

CPC classification number: H01L21/561 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2924/14 ,  H01L2924/19041

Abstract: PROBLEM TO BE SOLVED: To prevent an entire resin protective film from being warped easily when curing the resin protective film when forming the resin protective film for protecting the bottom and sides of a silicon substrate. SOLUTION: First, a trench 27 is formed in a semiconductor wafer 21, a sealing film 12, and the like in a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into respective silicon substrates 1 by the formation of the trench 27. Then, the resin protective film 11 is formed on a bottom of the respective silicon substrates 1 including the inner part of the trench 27. In this case, the semiconductor wafer 21 is separated into the respective silicon substrates 1. However, a support plate 24 is affixed to upper surfaces of a columnar electrode 10 and the sealing film 12 via an adhesive layer 23. Therefore, when the resin protective film 11 is formed, it is possible to prevent the entire resin protective film 11 including the separated silicon substrates 1 from being warped easily. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：为了防止在形成用于保护硅衬底的底部和侧面的树脂保护膜时固化树脂保护膜时容易使整个树脂保护膜翘曲。 解决方案：首先，在切割街22中的半导体晶片21，密封膜12等中形成沟槽27，并且与切割路22的两侧对应的部分形成沟槽27.在该状态下，半导体 通过形成沟槽27将晶片21分离成各自的硅衬底1.然后，在包括沟槽27的内部的各个硅衬底1的底部上形成树脂保护膜11.在这种情况下，半导体 晶片21被分离成各个硅基板1.然而，支撑板24通过粘合层23固定在柱状电极10和密封膜12的上表面上。因此，当形成树脂保护膜11时 可以防止包含分离的硅基板1的整个树脂保护膜11容易翘曲。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2001085563A

公开(公告)日：2001-03-30

申请号：JP26092599

申请日：1999-09-14

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU

IPC: H01L23/12 ,  H01L21/60

Abstract: PROBLEM TO BE SOLVED: To adjust the thickness of a sealing film, between columnar electrodes of a semiconductor device, in its early stages. SOLUTION: The sealing film 16 is formed with a print mask and a squeegee 15. In this case, the tip of the squeegee 15 has a flank almost in a V-shape and is pressed in between columnar electrodes 12 for printing. Then the sealing film 16 is recessed between the columnar electrodes 12. In this case, the thickness of the sealing film 16 is directly proportional to the weight of liquid sealing resin printed on a silicon substrate 11. The print quantity (weight) of the liquid sealing resin printed on the silicon substrate 11, is in inversely proportional to the intrusion quantity of the squeegee 15 (how much the tip part of the squeegee 15 is pressed inbetwen the columnar electrodes 12 from the top surface of the columnar electrodes 12). For the purpose, the press-in quantity of the squeegee 15 is adjusted to suppress the weight of the liquid sealing resin printed on the silicon substrate 11, and consequently the thickness of the sealing film 16 can be controlled.

公开(公告)号：JP2001077145A

公开(公告)日：2001-03-23

申请号：JP25251299

申请日：1999-09-07

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU ,  WAKABAYASHI TAKESHI

IPC: H01L23/12 ,  H01L21/60

Abstract: PROBLEM TO BE SOLVED: To shorten a treatment time for upper surfaces of pillar electrodes, exposed from a sealing film when a semiconductor device which is provided with the pillar electrodes and the sealing film is manufactured. SOLUTION: A covering film 15, made of polyurethane and pillar electrodes 14 made of copper and so on, is formed on the upper surface of a silicon substrate 11 in an aperture 13 of a resist plated layer 13. Next the resin plated layer 12 is peeled. Next a sealing film 16, made of epoxy family resin, is formed on the whole upper surface of the silicon substrate 11 including the covering film 15. Next, the covering film 15 and the sealing film 16 formed thereon are eliminated together and are exposed on the pillar electrode 14. In this case, a treatment time for upper surfaces of the pillar electrodes 14 which is exposed can be shortened as compared with the case of polishing treatment.

公开(公告)号：JPH1032220A

公开(公告)日：1998-02-03

申请号：JP20551396

申请日：1996-07-17

Applicant: CASIO COMPUTER CO LTD

Inventor： WAKIZAKA SHINJI ,  HIRAIDE TAKASHI ,  KUWABARA OSAMU

IPC: H01L21/60 ,  H01L23/12 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To restrain peel-off of a connection pad of a sub-circuit board and restrain generation of cracks in the sub-circuit board, by applying a resin film from the bottom of a bump formed on a connection pad of a circuit board to the surface of the circuit board. SOLUTION: A bump 9 is formed on a connection pad 3 formed on the other surface of a circuit board 1 which has a semiconductor chip 11 mounted on one surface thereof. In such a semiconductor device, a resin film 31 is applied from the bottom of the bump 9 to the other surface of the circuit board 1. For example, a semiconductor device is prepared in which the semiconductor chip 11 is mounted on the upper surface of the sub-circuit board 1 made of a multilayer wiring glass ceramic board and in which a resin sealing material 17 is provided between the sub-circuit board 1 and the semiconductor chip 11, while the solder bump 9 is formed under the connection pad 3. The semiconductor device is turned upside down, and a liquid resin is dropped onto the sub-circuit board 1 near the bottom of the solder bump 9. Wet expansion of the liquid resin due to its fluidity causes application of the resin film 31.

公开(公告)号：JP2518186B2

公开(公告)日：1996-07-24

申请号：JP13857790

申请日：1990-05-30

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU ,  MUTO JIRO ,  ABE AKIHIKO

IPC: B41J2/335

公开(公告)号：JPH07202412A

公开(公告)日：1995-08-04

申请号：JP34918293

申请日：1993-12-28

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU

IPC: B23K1/008 ,  B23K3/04 ,  B23K3/06 ,  H01L21/60 ,  H05K3/34

Abstract: PURPOSE:To provide an easy and positive method and an apparatus for soldering. CONSTITUTION:A coater 13 applies cream solder on a substrate 31 across a plurality of electrodes. A TAB 35 is then set above the substrate 31 such that the electrode of the TAB 35 is superposed on that of the substrate 31. A TAB stopper 19 then lowers to stop the TAB 35 and a gas is jetted at a temperature higher than the melting point of solder from a unit 21. The molten cream solder is thereby repelled by the board 31 and localized between the electrodes to be soldered by the surface tension of solder itself. Consequently, a sufficient quantity of solder is provided between the electrodes to be soldered while preventing short circuit between adjacent electrodes. When the solder is cooled and solidified, the electrodes are secured positively.