公开(公告)号：US20240250120A1

公开(公告)日：2024-07-25

申请号：US18157939

申请日：2023-01-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh Mani Pandey ,  Rajendran Krishnasamy

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/311 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0642 ,  H01L21/02203 ,  H01L21/31111 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7833

Abstract: Disclosed are embodiments of a semiconductor structure including a semiconductor device with an active device region and, within the active device region, porous semiconductor material adjacent to an isolation structure. In some embodiments, the semiconductor device can be a laterally diffused metal oxide semiconductor field effect transistor (LDMOSFET). The LDMOSFET can include an active device region, a well region within the active device region and, within the well region, an isolation structure, a porous region immediately adjacent to the isolation structure, and a drain drift region that borders the isolation structure (e.g., between a channel region and a drain region). The porous region can modify the electric field in the drain drift region around the isolation structure and, as a result, can improve both drain-to-source breakdown voltage (BVdss) and transconductance (Gm) of the device. Also disclosed are method embodiments for forming the semiconductor structure.

公开(公告)号：US20240213240A1

公开(公告)日：2024-06-27

申请号：US18086938

申请日：2022-12-22

Applicant: GlobalFoundries U.S. Inc.

Inventor： Sagar Premnath Karalkar ,  Ephrem Gebreselasie ,  Rajendran Krishnasamy ,  Robert J. Gauthier, JR. ,  Souvick Mitra

IPC: H01L27/02

CPC classification number: H01L27/0262 ,  H01L21/76224

Abstract: Structures for an electrostatic discharge protection device and methods of forming same. The structure comprises a first well and a second well in the semiconductor substrate. The first and second wells have a first conductivity type. The structure further comprises a third well and a fourth well in the semiconductor substrate. The third and fourth wells have a second conductivity type, the third well includes a portion that overlaps with the first well, and the fourth well includes a portion that overlaps with the second well.

公开(公告)号：US20240178290A1

公开(公告)日：2024-05-30

申请号：US18059186

申请日：2022-11-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： Megan Lydon-Nuhfer ,  Steven M. Shank ,  Aaron L. Vallett ,  Michel Abou-Khalil ,  Sarah A. McTaggart ,  Rajendran Krishnasamy

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/42376 ,  H01L29/0657 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42356 ,  H01L29/4916 ,  H01L29/6653

Abstract: An integrated circuit (IC) structure includes a V-shaped cavity in a semiconductor substrate. A source region and a drain region are on opposing sides of the V-shaped cavity. A gate structure includes a gate dielectric layer, spacers, and a gate electrode on the gate dielectric layer between the spacers. The gate structure is fully within the V-shaped cavity. The IC structure provides a switch that finds advantageous application as part of a low noise amplifier. The IC structure provides a smaller gate width, decreased capacitance, increased gain and increased radio frequency (RF) performance compared to planar devices or devices without the gate structure fully within V-shaped cavity.

公开(公告)号：US11949034B2

公开(公告)日：2024-04-02

申请号：US17849285

申请日：2022-06-24

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： John J. Ellis-Monaghan ,  Rajendran Krishnasamy ,  Siva P. Adusumilli ,  Ramsey Hazbun

IPC: H01L31/105 ,  H01L31/0288 ,  H01L31/18 ,  H01L31/0216

CPC classification number: H01L31/105 ,  H01L31/0288 ,  H01L31/1804 ,  H01L31/0216

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodetector and methods of manufacture. The structure includes: a photodetector; and a semiconductor material on the photodetector, the semiconductor material comprising a first dopant type, a second dopant type and intrinsic semiconductor material separating the first dopant type from the second dopant type.

公开(公告)号：US20240063212A1

公开(公告)日：2024-02-22

申请号：US17890725

申请日：2022-08-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anindya Nath ,  Alain F. Loiseau ,  Souvick Mitra ,  Rajendran Krishnasamy

IPC: H01L27/02 ,  H01L29/73 ,  H01L29/735 ,  H01L29/739

CPC classification number: H01L27/0255 ,  H01L29/7302 ,  H01L29/735 ,  H01L29/7393 ,  H01L27/0259

Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure with a diode over a lateral bipolar transistor. A structure according to the disclosure may include a lateral bipolar transistor within a monocrystalline semiconductor over a substrate. An insulator layer is over a portion of the monocrystalline semiconductor. A diode is within a polycrystalline semiconductor on the insulator layer. A cathode of the diode is coupled to a first well within the monocrystalline semiconductor. The first well defines one of an emitter terminal and a collector terminal of the lateral bipolar transistor.

公开(公告)号：US20230223337A1

公开(公告)日：2023-07-13

申请号：US17572681

申请日：2022-01-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Mark D. Levy ,  Fuad H. Al-Amoody ,  Siva P. Adusumilli ,  Spencer H. Porter ,  Ephrem Gebreselasie ,  Rajendran Krishnasamy

IPC: H01L23/525 ,  H01L21/768 ,  H01L23/36 ,  H01L23/34 ,  H01L23/522

CPC classification number: H01L23/5256 ,  H01L21/76877 ,  H01L23/36 ,  H01L23/345 ,  H01L21/76832 ,  H01L23/5226 ,  H01L21/76816

Abstract: A semiconductor structure includes a semiconductor device (e.g., an e-fuse or photonic device) and a metallic heating element adjacent thereto. The heating element has a lower portion within a middle of the line (MOL) dielectric layer adjacent to the semiconductor device and an upper portion with a tapered top end that extends into a back end of the line (BEOL) dielectric layer. A method of forming the semiconductor structure includes forming a cavity such that it has both a lower section, which extends from a top surface of a MOL dielectric layer downward toward a semiconductor device, and an upper section, which extends from the top surface of the MOL dielectric layer upward and which is capped by an area of a BEOL dielectric layer having a concave bottom surface. A metallic fill material can then be deposited into the cavity (e.g., through via openings) to form the heating element.

公开(公告)号：US11374040B1

公开(公告)日：2022-06-28

申请号：US17113418

申请日：2020-12-07

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： John J. Ellis-Monaghan ,  Steven M. Shank ,  Rajendran Krishnasamy ,  Ramsey Hazbun

IPC: H01L27/144 ,  H01L31/028 ,  H01L31/18 ,  H01L31/103 ,  H01L31/0312

Abstract: Structures including multiple photodiodes and methods of fabricating a structure including multiple photodiodes. A substrate has a first trench extending to a first depth into the substrate and a second trench extending to a second depth into the substrate that is greater than the first depth. A first photodiode includes a first light-absorbing layer containing a first material positioned in the first trench. A second photodiode includes a second light-absorbing layer containing a second material positioned in the second trench. The first material and the second material each include germanium.

公开(公告)号：US20250159999A1

公开(公告)日：2025-05-15

申请号：US18388441

申请日：2023-11-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anindya Nath ,  Uppili S. Raghunathan ,  Rajendran Krishnasamy ,  Sagar Premnath Karalkar ,  Alexander M. Derrickson ,  Vibhor Jain

IPC: H01L27/02

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a silicon control rectifier (SCR) and methods of manufacture. The structure includes: a doped region in a semiconductor substrate; at least two regions of semiconductor material comprising opposite doping types over the doped region; and polysilicon regions over respective ones of the least two regions of semiconductor material.

公开(公告)号：US20250140599A1

公开(公告)日：2025-05-01

申请号：US18385268

申请日：2023-10-30

Applicant: GlobalFoundries U.S. Inc.

Inventor： Jacob M. DeAngelis ,  Trevor S. Wills ,  Mark D. Levy ,  Spencer H. Porter ,  Brett T. Cucci ,  Rajendran Krishnasamy

IPC: H01L21/762 ,  H01L29/04 ,  H01L29/778

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to devices with isolation structures and methods of manufacture. The structure includes: a stack of semiconductor materials; a semiconductor substrate under the stack of semiconductor materials; a trench filled with in insulator material; and a damaged region of the stack of semiconductor materials extending from at least a bottom of the insulator material to the semiconductor substrate.

公开(公告)号：US20250072024A1

公开(公告)日：2025-02-27

申请号：US18237195

申请日：2023-08-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： Alvin J. Joseph ,  Mark D. Levy ,  Rajendran Krishnasamy ,  Johnatan A. Kantarovsky ,  Ajay Raman ,  Ian A. McCallum-Cook

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/45 ,  H01L29/778

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with a thermal plug and methods of manufacture. The structure includes: a semiconductor substrate; a gate structure over the semiconductor substrate; a source region on a first side of the gate structure; a drain region on a second side of the gate structure; and a thermal plug extending from a top side of the semiconductor substrate into an active region of the semiconductor substrate.