公开(公告)号：DE112011102160T5

公开(公告)日：2013-05-02

申请号：DE112011102160

申请日：2011-06-08

Applicant: IBM

Inventor： ILIADIS ILIAS ,  PLETKA ROMAN A ,  CIDECIYAN ROY DARON ,  HAAS ROBERT ,  HU XIAOYU ,  ELEFTHERIOU EVANGELOS S

IPC: G11C16/34

Abstract: Die Erfindung bezieht sich auf ein Verfahren zum Wear-Levelling (Ausgleich nachlassender Funktionsfähigkeit) bei Zellen oder Seiten oder Teilseiten oder Blöcken eines Speichers wie zum Beispiel eines Flash-Speichers, wobei das Verfahren aufweist: – Empfangen (S10) eines Blocks von Daten, der in eine Zelle oder Seite oder Teilseite oder einen Block des Speichers geschrieben werden soll; – Zählen (S40), wie häufig ein bestimmter Binärdatentyp ,0' oder ,1' geschrieben werden soll, in dem empfangenen Block von Daten; und – Verteilen (S50) des Schreibens des empfangenen Blocks von Daten auf Zellen oder Seiten oder Teilseiten oder Blöcke des Speichers, sodass die nachlassende Funktionsfähigkeit des Speichers im Hinblick auf die Anzahl des bestimmten Binärdatentyps ,0' oder ,1', die in dem zu schreibenden Block von Daten gezählt worden ist, ausgeglichen wird.

公开(公告)号：DE112011100199T5

公开(公告)日：2012-11-29

申请号：DE112011100199

申请日：2011-04-07

Applicant: IBM

Inventor： MATSUO HISATO ,  OHTANI KENJI ,  SEGER PAUL ,  CIDECIYAN ROY DARON ,  MITTELHOLZER THOMAS ,  TANAKA KEISUKE

IPC: G11B20/18

Abstract: Ein Verfahren zum Integrieren von Daten- und Vorsatzschutz bei Bandlaufwerken beinhaltet das Empfangen einer in Zeilen und Spalten gegliederten Datenanordnung. Die Anordnung wird so erweitert, dass sie einen oder mehrere Vorsätze für jede Datenzeile in der Anordnung beinhaltet. Das Verfahren stellt zwei Dimensionen von Fehlerkorrekturcode(ECC)-Schutz für die Daten in der Anordnung und eine einzige Dimension von ECC-Schutz für die Vorsätze in der Anordnung bereit. Eine entsprechende Vorrichtung wird hierin ebenfalls offenbart.

公开(公告)号：GB2488462A

公开(公告)日：2012-08-29

申请号：GB201208241

申请日：2010-12-16

Applicant: IBM

Inventor： CIDECIYAN ROY DARON ,  ELEFTHERIOU EVANGELOS ,  HAAS ROBERT ,  HU XIAO-YU ,  ILIADIS ILIAS ,  MITTELHOLZER THOMAS

IPC: G06F11/10

Abstract: Methods and apparatus are provided for controlling data management operations including storage of data in solid state storage (6) of a solid state storage system (5). Input data is stored in successive groups of data write locations in the solid state storage (6). Each group comprises a set of write locations in each of a plurality of logical subdivisions of the solid state storage (6). The input data to be stored in each group is encoded in accordance with first and second linear error correction codes. The encoding is performed by constructing from the input data to be stored in each group a logical array of rows and columns of data symbols. The rows and columns are respectively encoded in accordance with the first and second linear error correction codes to produce an encoded array in which all rows correspond to respective first codewords and columns correspond to respective second codewords. The encoding and storage operation is performed such that, in each said group, the encoded input data comprises a plurality of first codewords in each of a plurality of the logical subdivisions and each logical subdivision contains a portion of each of the second codewords for that group.

公开(公告)号：GB2488457A

公开(公告)日：2012-08-29

申请号：GB201207325

申请日：2010-12-16

Applicant: IBM

Inventor： CIDECIYAN ROY DARON ,  ELEFTHERIOU EVANGELOS ,  HAAS ROBERT ,  HU XIAO-YU ,  ILIADIS ILIAS

IPC: G06F11/10

Abstract: Methods and apparatus are provided for controlling a solid state storage device (5) in which the solid state storage (6) comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage (6). The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage (6), is maintained in memory (13). An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the or each said group containing write locations in that block. The recovered data is then re-stored as new input data.

公开(公告)号：CA2223781C

公开(公告)日：2002-05-21

申请号：CA2223781

申请日：1995-06-14

Applicant: IBM

Inventor： SCHOTT WOLFGANG HANS ,  CHEVILLAT PIERRE RENE ,  RUPF MARCEL ,  CIDECIYAN ROY DARON

IPC: H04B7/26 ,  H04J13/00 ,  H04L12/28 ,  H04B7/00 ,  H04Q11/00 ,  H04L12/413 ,  H04L12/56

Abstract: The present system is split into a physical layer (20), a data link layer, and a network layer (24). The data link layer is further split into three parts, namely, data link con- trol (23), and two medium access control parts (DLC) (21 and 22). The DLC layer (23) is concerned with link establishment, release and maintenance. The lower MAC part (21) may exist in multiple instances, whereas the upper MAC part (22) is unique. Physically, the two MAC parts (21 and 22) are separated on the network side because the upper MAC part resides in a RNC while the lower part exists in each base sta- tion. The connectionless packet ser- vice (CLPS) entity (25.1) provides the packet radio service to the mobile user and the CLPS entity (25.2) on th e netowrk side provides all facilities required for registration and authentication of mobile users, assigning and administrating their VCIs, and interfacing to a packet data network. The CLPS entities (25.1 and 25.2) use the logical link administrators (LLA) (26.x) to initiall y route messages via a regular dedicated control channel (DCCH) (27.x) to their peer entities. After the MS is attached to the PRCH, all messages exchanged between the CLPS entities (25.x) as well as user data packets are always directed via the respective PRCH (28.x). In this cas e, the control packets and user data packets an passed through the DLC (29.x) to the packet radio (PR) control entity (30.x). The packets a re fragmented and protected with an error control code, e.g. a block code (BC), by a respective unit (31.x) for detecting transmission erro rs on the receiving side. Then they are convolutionally encoded, interleaved (IL) by the entity (32.x), and transmitted over the PDCH (33). O n the receiving side the fragments are reconstructed from the received samples reassembled to packets, and forwarded to the target CLPS entity (25.2). When the decoder (31.2) detects the receipt of an erroneous packet fragment, an automatic request for repetition (ARQ) sche me provided in the PR control requests its retransmission.