公开(公告)号：SG186098A1

公开(公告)日：2013-01-30

申请号：SG2012087813

申请日：2010-11-08

Applicant: IBM

Inventor： CRADDOCK DAVID ,  GREGG THOMAS ,  GREINER DAN ,  LAIS ERIC NORMAN

Abstract: An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of bits includes a first portion of bits and a second portion of bits. The second portion of bits is used to index into one or more levels of address translation tables to perform the conversion, while the first portion of bits are ignored for the conversion. The first portion of bits are used to validate the address.

公开(公告)号：AU2010355800A1

公开(公告)日：2012-12-20

申请号：AU2010355800

申请日：2010-11-08

Applicant: IBM

Inventor： CRADDOCK DAVID ,  GREGG THOMAS ,  GREINER DAN ,  LAIS ERIC NORMAN ,  SCHMIDT DONALD WILLIAM

IPC: G06F12/10 ,  G06F13/28

Abstract: Various address translation formats are available for use in obtaining system memory addresses for use by requestors, such as adapter functions, in accessing system memory. The particular address translation format to be used by a given requestor is pre-registered in a device table entry associated with that requestor.

公开(公告)号：CA2800632A1

公开(公告)日：2011-12-29

申请号：CA2800632

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  GAINEY CHARLES ,  CRADDOCK DAVID ,  CONESKI ANTHONY ,  GLENDENING BETH ,  FARRELL MARK ,  GREGG THOMAS ,  NJOKU-CHARLES UGOCHUKWU

IPC: G06F13/28 ,  G06F13/38

Abstract: An adapter is enabled for use. The enabling includes assigning one or more address spaces to the adapter, based on a request. For each address space assigned to the adapter, a corresponding device table entry is assigned. When the adapter is no longer needed, it is disabled and the assigned device table entries become available.

公开(公告)号：CA2800630A1

公开(公告)日：2011-12-29

申请号：CA2800630

申请日：2010-11-08

Applicant: IBM

Inventor： CRADDOCK DAVID ,  GREGG THOMAS ,  GREINER DAN ,  LAIS ERIC NORMAN ,  SCHMIDT DONALD WILLIAM

IPC: G06F12/10 ,  G06F13/28

Abstract: Various address translation formats are available for use in obtaining system memory addresses for use by requestors, such as adapter functions, in accessing system memory. The particular address translation format to be used by a given requestor is pre-registered in a device table entry associated with that requestor.

公开(公告)号：ZA201209698B

公开(公告)日：2018-12-19

申请号：ZA201209698

申请日：2012-12-20

Applicant: IBM

Inventor： BELMAR BRENTON FRANCOIS ,  TARCZA RICHARD ,  FARRELL MARK ,  SCHMIDT DONALD WILLIAM ,  CRADDOCK DAVID ,  EASTON JANET ,  GREGG THOMAS ,  SITTMANN III GUSTAV ,  OSISEK DAMIAN LEO

Abstract: The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions.

公开(公告)号：ZA201209699B

公开(公告)日：2015-06-24

申请号：ZA201209699

申请日：2012-12-20

Applicant: IBM

Inventor： SITTMANN III GUSTAV ,  GREGG THOMAS ,  EASTON JANET ,  CRADDOCK DAVID ,  FARRELL MARK ,  LAIS ERIC NORMAN

IPC: G06F20060101

Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.

公开(公告)号：ES2535333T3

公开(公告)日：2015-05-08

申请号：ES10781635

申请日：2010-11-08

Applicant: IBM

Inventor： SITTMANN III GUSTAV ,  CRADDOCK DAVID ,  GREGG THOMAS ,  FARRELL MARK ,  EASTON JANET ,  LAIS ERIC NORMAN

IPC: G06F13/38 ,  G06F9/48 ,  G06F13/24

Abstract: Un método de gestión de peticiones de interrupción en un entorno informático, caracterizado por comprender los pasos de: en respuesta a ejecutar una operación de interrupciones de registro de instrucción Modificar los Controles de Función de PCI (MPFC) que especifica un gestor de función de un adaptador, especificar (601) en una tabla localizada en un centro de entrada/salida (I/O) acoplado al adaptador, una ubicación en la memoria del sistema de un vector de bit de interrupción de adaptador (AIBV) del adaptador, el AIBV incluido en una formación de uno o más AIBV y una ubicación en la memoria del sistema de un bit de resumen de interrupción de adaptador (AISB) de una formación de AISB; recibir (603) desde el adaptador una petición de interrupción; y en respuesta a la petición recibida, fijar (605) por el centro de I/O un indicador en el AIBV que indica un tipo de evento desde el adaptador y fijar (606) el AISB que indica que un indicador está fijado en el AIBV.

公开(公告)号：HRP20141105T1

公开(公告)日：2015-01-02

申请号：HRP20141105

申请日：2014-11-13

Applicant: IBM

Inventor： GREINER DAN ,  CRADDOCK DAVID ,  GREGG THOMAS ,  FARRELL MARK

IPC: G06F9/312 ,  G06F13/38

公开(公告)号：ZA201209649B

公开(公告)日：2014-05-28

申请号：ZA201209649

申请日：2012-12-19

Applicant: IBM

Inventor： CRADDOCK DAVID ,  GREINER DAN ,  GREGG THOMAS ,  LAIS ERIC NORMAN

IPC: G06F20060101

Abstract: An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of bits includes a first portion of bits and a second portion of bits. The second portion of bits is used to index into one or more levels of address translation tables to perform the conversion, while the first portion of bits are ignored for the conversion. The first portion of bits are used to validate the address.

公开(公告)号：AU2010355800B2

公开(公告)日：2014-04-17

申请号：AU2010355800

申请日：2010-11-08

Applicant: IBM

Inventor： CRADDOCK DAVID ,  GREGG THOMAS ,  GREINER DAN ,  LAIS ERIC NORMAN ,  SCHMIDT DONALD WILLIAM

IPC: G06F12/10 ,  G06F13/28

Abstract: Various address translation formats are available for use in obtaining system memory addresses for use by requestors, such as adapter functions, in accessing system memory. The particular address translation format to be used by a given requestor is pre-registered in a device table entry associated with that requestor.