公开(公告)号：IT8025970D0

公开(公告)日：1980-11-14

申请号：IT2597080

申请日：1980-11-14

Applicant: IBM

Inventor： HODGSON RODNEY TREVOR ,  HOVEL HAROLD JOHN

IPC: H01L31/042 ,  H01L31/052 ,  H01L31/055 ,  F24J

公开(公告)号：IT7927745D0

公开(公告)日：1979-11-30

申请号：IT2774579

申请日：1979-11-30

Applicant: IBM

Inventor： HOVEL HAROLD JOHN

IPC: H01L31/04 ,  H01L31/068

公开(公告)号：DE2747717A1

公开(公告)日：1978-05-11

申请号：DE2747717

申请日：1977-10-25

Applicant: IBM

Inventor： BLAKESLEE A EUGENE ,  HOVEL HAROLD JOHN ,  MCGRODDY JAMES CLEARY

IPC: H01L31/052 ,  H01L23/40 ,  H01L31/06

Abstract: A photoresponsive device comprises (a) a device body having two opposed parallel major surfaces, (b) a photoresponsive semiconductor active region along a first major surface, (c) a region of electrically insulating material epitaxial with the active regions, separating it from the second major surface, and (d) a heat sink bonded to the second major surface. Used esp. for photoelectric conversion cell arrays. The integral insulator may be much smaller than separate insulators allowing max. thermal conduction, and full use can be made of the accurate control of diffusion and vapour deposition techniques.

公开(公告)号：DE2448478A1

公开(公告)日：1975-04-24

申请号：DE2448478

申请日：1974-10-11

Applicant: IBM

Inventor： CUOMO JEROME JOHN ,  HOVEL HAROLD JOHN

IPC: H01L21/22 ,  H01L21/205 ,  H01L21/225 ,  H01L21/20

Abstract: A process for the preparation of a homojunction in a semiconductor substrate, e.g., a p-n junction, during growth of a heterojunction between the substrate and a second semiconductor consisting of either gallium nitride or aluminum nitride where aluminum atoms from the aluminum nitride or gallium atoms from the gallium nitride diffuse into the substrate in a region of the substrate adjacent the aluminum nitride or gallium nitride to form the homojunction.

公开(公告)号：DE2326108A1

公开(公告)日：1973-12-20

申请号：DE2326108

申请日：1973-05-23

Applicant: IBM

Inventor： CUOMO JEROME JOHN ,  HOVEL HAROLD JOHN

IPC: G11C11/41 ,  G11C11/39 ,  G11C13/00 ,  H01L21/8247 ,  H01L29/20 ,  H01L29/267 ,  H01L29/68 ,  H01L29/788 ,  H01L29/792 ,  H01L45/00 ,  G11C11/34

Abstract: A non-volatile bistable switch and memory device comprising a GaN-Si heterojunction. Switching between its high impedance state and low impedance state, and viceversa, may be effected in either a bipolar or unipolar mode. Impedance states are retained up to several months with zero power.

公开(公告)号：GB1300528A

公开(公告)日：1972-12-20

申请号：GB1362471

申请日：1971-05-07

Applicant: IBM

Inventor： HOVEL HAROLD JOHN

IPC: H01L21/00 ,  H01L29/861 ,  H03K3/313 ,  H03K17/70

Abstract: 1300528 Semi-conductor devices INTERNATIONAL BUSINESS MACHINES CORP 7 May 1971 [17 June 1970] 13624/71 Heading H1K A " non-volatile "bi-stable switching element comprises a heterojunction diode one of the layers of which is of a material having a high density of defects (excluding normal dopants). This device maintains its impedance state when the supply is removed. In the characteristic shown in Fig. 2 line 3 represents a high-impedance state and line 5 a low-impedance state. Initially the device is in the high-impedance state which can be maintained indefinitely, the traps being filled, but when a reverse bias greater than V RB is applied the traps are emptied and the device switches along path 4 to the low-impedance state 5. While reverse bias is applied this state can be maintained and even at zero bias the lowimpedance state persists for several weeks so that on re-application of reverse bias the lowimpedance characteristic is exhibited. If the device is forward biased to a current I FS it switches along path 6 back to the highimpedance state 3. If the layer containing the defects is lightly doped the forward and reverse characteristics are symmetrical about the origin as in Fig. 2 but if the deposited layer is more heavily doped the high-impedance curve follows a normal diode characteristic in the forward direction, Fig. 3 (not shown). The device may be produced by depositing N-type GaP on a P-type Si substrate by a transport reaction method. The deposited layer may be doped with Sn, Te or Se by doping the source material, placing the doping element on the heater next to the source material, or by adding a compound of the dopant to the gas. Oxide film on the Si substrate may be removed before the growth step by heating in hydrogen or may be prevented from forming by the use of a film of iodine. The resulting wafer may be contacted using photolithographic techniques or may be dried and contacts alloyed to the surfaces. The contact to the GaP layer may be In, Sn or Au- Sn and the contact to the Si layer may be of Al or In or this may be mounted on a header. If the correct characteristic is not obtained the device may be formed by applying a number of large reverse voltage pulses. Various alternatives are mentioned including P-type GaP on N-type Si and N-type ZnSe on P-type Ge. The substrate may be monocrystalline, polyorystalline or amorphous, may be III-V compound such as GaP, GaAs, or GaAsP, or Group IV material such as SiC. The layer may be deposited on a specific crystallographic plane to produce the required density of defects (dislocations and stacking faults) but traps may be provided by introducing a deep level impurity such as Cu, Cr or Fe into the deposited layer.