公开(公告)号：US20150037685A1

公开(公告)日：2015-02-05

申请号：US13955221

申请日：2013-07-31

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Michael Sorger ,  Magdalena Forster ,  Katharina Schmut

IPC: H01M2/16

CPC classification number: H01M2/1673 ,  H01M2/145 ,  H01M2/1646 ,  H01M10/0525 ,  H01M2300/0085 ,  Y02P70/54 ,  Y02T10/7011 ,  Y10T29/49108

Abstract: Embodiments provide a battery cell including a porous membrane, the porous membrane including transformed semiconductor material. The porous membrane separates a first half-cell from a second half-cell of the battery cell. The porous membrane comprises channels allowing ions and/or an electrolyte to move between the first half-cell and the second half-cell.

Abstract translation: 实施例提供了包括多孔膜的电池单元，多孔膜包括转化的半导体材料。 多孔膜将第一半电池与电池单元的第二半电池分开。 多孔膜包括允许离子和/或电解质在第一半电池和第二半电池之间移动的通道。

公开(公告)号：US20140106229A1

公开(公告)日：2014-04-17

申请号：US13653493

申请日：2012-10-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Joachim Hirschler ,  Magdalena Forster ,  Michael Sorger ,  Katharina Schmut ,  Bernhard Goller ,  Philemon Schweizer ,  Michael Sternad ,  Thomas Walter

IPC: H01M4/38 ,  H01M4/583 ,  H01M4/04 ,  H01M4/02

CPC classification number: H01M4/04 ,  H01M4/13 ,  H01M4/134 ,  H01M4/1395 ,  H01M4/386 ,  H01M10/052 ,  H01M10/054 ,  H01M2004/021

Abstract: A battery electrode in accordance with various embodiments may include: a substrate including a surface configured to face an ion-carrying electrolyte; and a first diffusivity changing region at a first portion of the surface, wherein the first diffusivity changing region is configured to change diffusion of ions carried by the electrolyte into the substrate, and wherein a second portion of the surface is free from the first diffusivity changing region.

Abstract translation: 根据各种实施例的电池电极可以包括：基板，其包括被配置为面向离子载体电解质的表面; 以及在所述表面的第一部分处的第一扩散变化区域，其中所述第一扩散变化区域被配置为改变由所述电解质携带的离子的扩散到所述衬底中，并且其中所述表面的第二部分没有所述第一扩散率变化 地区。

公开(公告)号：US12249504B2

公开(公告)日：2025-03-11

申请号：US17743006

申请日：2022-05-12

Applicant: Infineon Technologies AG

Inventor： Bernhard Goller ,  Alexander Christian Binter ,  Tobias Hoechbauer ,  Martin Huber ,  Iris Moder ,  Matteo Piccin ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/78

Abstract: pa The method of processing a semiconductor wafer includes forming one or more epitaxial layers over its first main surface. It also involves forming one or more porous layers within the semiconductor wafer or within the epitaxial layers. Together, the semiconductor wafer, the epitaxial layer(s), and the porous layer(s) form a substrate. Next, doped regions of a semiconductor device are formed within the epitaxial layer(s). After forming these doped regions, a non-porous part of the semiconductor wafer is separated from the rest of the substrate along the porous layer(s).

公开(公告)号：US11742215B2

公开(公告)日：2023-08-29

申请号：US17386699

申请日：2021-07-28

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Alexander Breymesser ,  Bernhard Goller ,  Matthias Kuenle ,  Helmut Oefner ,  Francisco Javier Santos Rodriguez ,  Stephan Voss

IPC: H01L21/324 ,  H01L21/78 ,  H01L21/265

CPC classification number: H01L21/3247 ,  H01L21/26506 ,  H01L21/7806

Abstract: A method of forming a semiconductor device, including forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate, increasing the porosity of the first semiconductor layer, first annealing the first semiconductor layer at a temperature of at least 1050° C., forming a second semiconductor layer on the first semiconductor layer and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer.

公开(公告)号：US11328955B2

公开(公告)日：2022-05-10

申请号：US16938206

申请日：2020-07-24

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Bernhard Goller

IPC: H01L21/768 ,  H01L21/302 ,  H01L21/321 ,  H01L21/78 ,  H01L23/528

Abstract: A substrate wafer arrangement includes a substrate layer having a first main side and a second main side opposite the first main side, the first main side being a front-side and the second main side being a back-side, the substrate layer further having a plurality of semiconductor chips. A polymer structure arranged between the plurality of semiconductor chips extends at least from the front-side of the substrate layer to the back-side of the substrate layer and protrudes from a back-side surface of the substrate layer. The polymer structure separates a plurality of insular islands of conductive material, each insular island corresponding to a respective semiconductor chip of the plurality of semiconductor chips. Semiconductor devices produced from the substrate wafer arrangement are also described.

公开(公告)号：US11139375B2

公开(公告)日：2021-10-05

申请号：US16502451

申请日：2019-07-03

Applicant: Infineon Technologies AG

Inventor： Carsten Schaeffer ,  Alexander Breymesser ,  Bernhard Goller ,  Ronny Kern ,  Matteo Piccin ,  Roland Rupp ,  Francisco Javier Santos Rodriguez

IPC: H01L29/16 ,  H01L21/784 ,  H01L21/683 ,  H01L21/04 ,  H01L29/66 ,  H01L23/31 ,  H01L23/00 ,  H01L29/45

Abstract: According to an embodiment of a method described herein, a silicon carbide substrate is provided that includes a plurality of device regions. A front side metallization may be provided at a front side of the silicon carbide substrate. The method may further comprise providing an auxiliary structure at a backside of the silicon carbide substrate. The auxiliary structure includes a plurality of laterally separated metal portions. Each metal portion is in contact with one device region of the plurality of device regions.

公开(公告)号：US20210053148A1

公开(公告)日：2021-02-25

申请号：US16986411

申请日：2020-08-06

Applicant: Infineon Technologies AG

Inventor： Ralf Rieske ,  Alexander Binter ,  Wolfgang Diewald ,  Bernhard Goller ,  Heimo Graf ,  Gerald Lackner ,  Jan Richter ,  Roland Rupp ,  Guenter Schagerl ,  Marko Swoboda

IPC: B23K26/0622 ,  H01L21/78 ,  B23K26/00 ,  H01L21/02

Abstract: Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.

公开(公告)号：US10784161B2

公开(公告)日：2020-09-22

申请号：US16144169

申请日：2018-09-27

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Bernhard Goller

IPC: H01L21/768 ,  H01L21/302 ,  H01L21/321 ,  H01L21/78 ,  H01L23/528

Abstract: A method for manufacturing a semiconductor device includes: partially dicing a substrate wafer arrangement having a plurality of semiconductor chips, wherein the partial dicing forms trenches around the semiconductor chips on a front-side of the substrate wafer arrangement, the depth being greater than a target thickness of a semiconductor chip; filling the trenches with a polymer material to form a polymer structure; first thinning of the back-side to expose portions of the polymer structure; forming a conductive layer on the back-side of the substrate wafer arrangement so that the exposed portions of the polymer structure are covered; second thinning of the back-side to form insular islands of conductive material, the insular islands separated from each other by the polymer structure, each insular island corresponding to a respective one of the semiconductor chips; and dicing the substrate wafer arrangement along the polymer structure.

公开(公告)号：US10170746B2

公开(公告)日：2019-01-01

申请号：US13653493

申请日：2012-10-17

Applicant: Infineon Technologies AG

Inventor： Joachim Hirschler ,  Magdalena Forster ,  Michael Sorger ,  Katharina Schmut ,  Bernhard Goller ,  Philemon Schweizer ,  Michael Sternad ,  Thomas Walter

IPC: H01M4/13 ,  H01M4/134 ,  H01M4/04 ,  H01M4/1395 ,  H01M4/38 ,  H01M10/052 ,  H01M10/054 ,  H01M4/02

Abstract: A battery electrode in accordance with various embodiments may include: a substrate including a surface configured to face an ion-carrying electrolyte; and a first diffusivity changing region at a first portion of the surface, wherein the first diffusivity changing region is configured to change diffusion of ions carried by the electrolyte into the substrate, and wherein a second portion of the surface is free from the first diffusivity changing region.

公开(公告)号：US09929438B2

公开(公告)日：2018-03-27

申请号：US15427124

申请日：2017-02-08

Applicant: Infineon Technologies AG

Inventor： Kamil Karlovsky ,  Rafael Janski ,  Michael Sorger ,  Magdalena Forster ,  Katharina Schmut ,  Vijaye Kumar Rajaraman ,  Rainer Leuschner ,  Bernhard Goller

IPC: H01M10/058 ,  H01M10/0525 ,  H01M2/04 ,  H01M2/08 ,  H01M2/02 ,  H01M2/36 ,  H01M4/134 ,  H01M4/38

CPC classification number: H01M10/058 ,  H01M2/0202 ,  H01M2/0207 ,  H01M2/024 ,  H01M2/026 ,  H01M2/027 ,  H01M2/0285 ,  H01M2/0404 ,  H01M2/0486 ,  H01M2/08 ,  H01M2/361 ,  H01M4/134 ,  H01M4/386 ,  H01M4/66 ,  H01M10/04 ,  H01M10/0525 ,  H01M10/4257 ,  H01M2220/20 ,  H01M2220/30 ,  Y02E60/122 ,  Y02P70/54 ,  Y10T29/4911

Abstract: A method of manufacturing a lithium ion battery includes: attaching a lid to a first main surface of a first substrate, the lid including a conductive coves element; forming a cavity between the lid and the first substrate; forming an anode comprising a component made of a semiconductor material at the first substrate; forming a cathode at the lid; and filling an electrolyte into the cavity.